ign: center;">NIFS
SCIENCE DETECTOR WIRING DESIGN

Mark Downing

Research School of Astronomy
and Astrophysics

Institute of Advanced Studies

Australian National University

Revision
History

Revision No.

Author
&

Date

Approval
&

Date

Description

Revision
1

Mark Downing

23 August 1999

Jan van Harmelen

01 October 1999

Original document.

 
 
 
 

Contents

Purpose

This document described
the science detector wiring design for the Gemini Near-infrared Integral-Field
Spectrograph (NIFS) as specified in NIFS Science Detector Wiring Requirements
(SDN0008.02).

Applicable
Documents

Document ID

Source

Title

SDN0008.02

RSAA

NIFS Science Detector
Wiring Requirements

 
 
 



Introduction

The science detector wiring
for the Gemini Near-infrared Integral-Field Spectrograph (NIFS) provides
the components to safely mount the science detector and to conduct signals
from the detector to the external wall of the cryostat. The requirements
for the NIFS science detector wiring are specified in SDN0008.02
(NIFS Science Detector Wiring Requirements).

Science
Detector Wiring Design

The block diagram of the
science detector wiring is shown in Figure
1.

Figure 1: Block diagram of the science detector wiring.

The baseline design of
the science detector wiring is as follows:

Three layer FR4 PCB Detector Mounting Board, which will contain the
Zero Insertion Force (ZIF) socket to mount the detector and the Surface
Mount Components (SMC) for decoupling and protection. This board will
also provide the cooling path through which the detector will be cooled
and thermally servo controlled.
Teflon (PTFE)
Flex Circuits, which will provide the flexible wiring between the Detector
Mounting Board, Intermediate Board and the hermetic connector.
An optional,
two layer FR4 PCB Intermediate Board, which will contain two sets of
microminature D connectors. This board may be needed to ease assembly
and disassembly of the cryostat.
Circular Hermetic
Connector, which will provide the through-wall vacuum seal connection
to outside the cryostat.


Summary
of Issues Requiring Further Investigation

The following subsections
list the issues requiring further investigation for each component of
the science detector wiring as well as other issues of importance.

Detector
Mounting Board

The following issues relating
to the Detector Mounting Board require further investigation.

The type, material, and selection of ZIF socket to mount the detector.
The PCB type,
material, and number of layers.
How the detector
will be cooled.
Use, selection,
and problems associated with Surface Mount Components.


Flex
Circuit

The following issues relating
to the flex circuits require further investigation.

Selection of Flex Circuit to reduce detector output amplifier-settling
time.
Flexibility
of Flex Circuit to accommodate focus movement.
Heat Load through
flex circuit.
Issues relating
to selection of flex circuit material.
Guidelines to
track layout and grounding.


Connectors

The following issues relating
to connectors require further investigation.

Selection of board to flex circuit connectors, which are easy to use
and reliable.
Selection of
hermetic connectors, which are reliable and can be easily used with
flex circuits.


Intermediate
Board

The following issues relating
to the Intermediate Board require further investigation.

Advantage and disadvantage of having an Intermediate Board.
The PCB type,
material and number of layers.


Other
Issues

The following is a list of other issues, which require
further investigation.

Antistatic protection
High Vacuum
requirements.


General
Description of Science Array

The HAWAII-2 is a hybrid
assembly of a low capacitance HgCdTe infrared detector array coupled
via indium bumps to low noise CMOS silicon multiplexer. Table
1 describes the detector in more detail.

Table 1
HAWAII-2 specification

Parameter

Measured
Values

Units

Number of Pixels

2048(H) x2048(V)

 

Architecture

4 fully Independent 1024x1024 Quadrants

 

Detector Interface Circuit

SFD 0.8um CMOS

-

Cell Pitch

18

µm

Die Size

<40

mm<sup>2

Integration Capacity @ 0.5V VRESET

1.0x10<sup>5

carriers

Integration Capacitance

18-35

fF

Signal Conversion Gain

3.4-6.8

V/e-

Output Signal Excursion

.4-1

V

Minimum Read Noise

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