ut voltage V, having a
magnitude (and possibly polarity) that
differs from Vg. For example, in a
computer off-line power supply, the
120 V or 240 V ac utility voltage is
rectified, producing a dc voltage of
approximately 170 V or 340 V,
respectively. A dc-dc converter then
reduces the voltage to the regulated 5 V
or 3.3 V required by the processor ICs.
High efficiency is invariably
required, since cooling of inefficient
power converters is difficult and
expensive. The ideal dc-dc converter
exhibits 100% efficiency; in practice,
efficiencies of 70% to 95% are
typically obtained. This is achieved
using switched-mode, or chopper,
circuits whose elements dissipate negligible power. Pulse-width modulation (PWM) allows control and
regulation of the total output voltage. This approach is also employed in applications involving alternating
current, including high-efficiency dc-ac power converters (inverters and power amplifiers), ac-ac power
converters, and some ac-dc power converters (low-harmonic rectifiers).
A basic dc-dc converter circuit known as the buck converter is illustrated in Fig. 1. A single-pole
double-throw (SPDT) switch is connected to the dc input voltage V
g
as shown. The switch output voltage
+ V
g
L
C
R
1
2
+
V Dc
input
Switch network
Low-pass filter
Load
Dc output
(a)
+
v
s
(
t
) v
s
(
t
)
V
g
DT
s
(1
D
)
T
s
0
t
Switch
position:
1
2
1
V
s
=
DV
g
(b)

Figure 1. The buck converter consists of a switch network that
reduces the dc component of voltage, and a low-pass filter
that removes the high-frequency switching harmonics: (a)
schematic, (b) switch voltage waveform. v
s
(t) is equal to V
g
when the switch is in position 1, and is equal to zero when the switch is in position 2.
The switch position is varies periodically, such that v
s
(t) is a rectangular waveform having period T
s
and
duty cycle D. The duty cycle is equal to the fraction of time that the switch is connected in position 1, and
hence 0 D 1. The switching frequency f
s
is equal to 1/T
s
. In practice, the SPDT switch is realized using
semiconductor devices such as diodes, power MOSFETs, IGBTs, BJTs, or thyristors. Typical switching
frequencies lie in the range 1 kHz to 1 MHz, depending on the speed of the semiconductor devices.
The switch network changes the dc component of the voltage. By Fourier analysis, the dc
component of a waveform is given by its average value. The average value of v
s
(t) is given by
V
s
= 1
T
s
v
s
(t)dt
0
T</i>s
= DV
g
(1)
The integral is equal to the area under the waveform, or the height V
g
multiplied by the time DT
s
. It can be
seen that the switch network reduces the dc component of the voltage by a factor equal to the duty cycle D.
Since 0 D 1, the dc component of V
s
is less than or equal to V
g
.
The power dissipated by the switch network is ideally equal to zero. When the switch contacts are
closed, then the voltage across the contacts is equal to zero and hence the power dissipation is zero. When
the switch contacts are open, then there is zero current and the power dissipation is again equal to zero.
Therefore, the ideal switch network is able to change the dc component of voltage without dissipation of
power.
In addition to the desired dc voltage component V
s
, the switch waveform v
s
(t) also contains
undesired harmonics of the switching frequency. In most applications, these harmonics must be removed,
such that the converter output voltage v(t) is essentially equal to the dc component V = V
s
. A low-pass filter
is employed for this purpose. The converter of Fig. 1 contains a single-section L-C low-pass filter. The
filter has corner frequency f
0
given by
f
0
=
1
2 LC
(2)
The corner frequency f
0
is chosen to be sufficiently less than the switching frequency f
s
, so that the filter
essentially passes only the dc component of v
s
(t). To the extent that the inductor and capacitor are ideal, the
filter removes the switching harmonics without dissipation of power. Thus, the converter produces a dc
output voltage whose magnitude is controllable via the duty cycle D, using circuit elements that (ideally) do
not dissipate power.
The conversion ratio M(D) is defined as the ratio of the dc output voltage V to the dc input voltage
V
g
under steady-state conditions:
M(D) = V
V
g

(3)
For the buck converter, M(D) is given by
M(D) = D
(4) This equation is plotted in Fig. 2. It can be seen that the dc output
voltage V is controllable between 0 and V
g
, by adjustment of the duty
cycle D.

Figure 3 illustrates one way to realize the switch network in
the buck converter, using a power MOSFET and diode. A gate drive
circuit switches the MOSFET between the conducting (on) and
blocking (off) states, as commanded by a logic signal (t). When (t)
is high (for 0 < t < DT
s
), then MOSFET Q
1
conducts with negligible
drain-to-source voltage. Hence, v
s
(t) is approximately equal to V
g
, and the diode is reverse-biased. The
positive inductor current i
L
(t) flows through the MOSFET. At time t = DT
s
, (t) becomes low, commanding
MOSFET Q
1
to turn off. The inductor current must continue to flow; hence, i
L
(t) forward-biases diode D
1
,
and v
s
(t) is now approximately equal to zero. Provided that the inductor current i
L
(t) remains positive, then
diode D
1
conducts for the remainder of the switching period. Diodes that operate in the manner are called
freewheeling diodes.
Since the converter output
voltage v(t) is a function of the
switch duty cycle D, a control
system can be constructed that
varies the duty cycle to cause the
output voltage to follow a given
reference v
r
. Figure 3 illustrates the
block diagram of a simple converter
feedback system. The output
voltage is sensed using a voltage
divider, and is compared with an
accurate dc reference voltage v
r
.
The resulting error signal is passed
through an op-amp compensation
network. The analog voltage v
c
(t) is next fed into a pulse-width modulator. The modulator produces a
switched voltage waveform that controls the gate of the power MOSFET Q
1
. The duty cycle D of this
waveform is proportional to the control voltage v
c
(t). If this control system is well designed, then the duty
cycle is automatically adjusted such that the converter output voltage v follows the reference voltage v
r
, and
is essentially independent of variations in v
g
or load current.
V
g
0
0
V
1
Figure 2. Buck converter dc
output voltage V vs.
duty cycle D. (
t
)
T
s
DT
s
t
+ +
v v
g
+
Compensator
v
r
Reference
input
Pulse-width
modulator
v
c
Transistor
gate driver G
c
(
s
)
v
e
Error
signal
i
i
L
H
(
s
)
Q
1
D
1
+
v
s
Figure 3. Realization of the ideal SPDT switch using a transistor
and freewheeling diode. In addition, a feedback loop is
added for regulation of the output voltage. Converter circuit topologies
A large number of dc-dc converter circuits are known that can increase or decrease the magnitude
of the dc voltage and/or invert its polarity [1-5]. Figure 4 illustrates several commonly used dc-dc converter
circuits, along with their respective conversion ratios. In each example, the switch is realized using a power
MOSFET and diode; however, other semiconductor switches such as IGBTs, BJTs, or thyristors can be
substituted if desired.
The first converter is the buck converter, which reduces the dc voltage and has conversion ratio
M(D) = D. In a similar topology known as the boost converter, the positions of the switch and inductor are
interchanged. This converter produces an output voltage V that is greater in magnitude than the input
voltage V
g
. Its conversion ratio is M(D) = 1/(1 D).
In the buck-boost converter, the switch alternately connects the inductor across the power input
and output voltages. This converter inverts the polarity of the voltage, and can either increase or decrease
the voltage magnitude. The conversion ratio is M(D) = - D/(1 D).
The Cuk converter contains inductors in series with the converter input and output ports. The
switch network alternately connects a capacitor to the input and output inductors. The conversion ratio
M(D) is identical to that of the buck-boost converter. Hence, this converter also inverts the voltage polarity,
while either increasing or decreasing the voltage magnitude.
The single-ended primary inductance converter (SEPIC) can also either increase or decrease the
voltage magnitude. However, it does not invert the polarity. The conversion ratio is M(D) = D/(1 D).

Buck converter
+
V V
g
M
(
D
)
D
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
Boost converter
V
g
+
V + + M
(
D
)
D
Buck-boost converter
V
g
+
V + 0
1
2
3
4
5
0
0.2
0.4
0.6
0.8
1
D
M
(
D
)
5
4
3
2
1
0
0
0.2
0.4
0.6
0.8
1
Cuk converter
SEPIC
V
g
+ +
V D
M
(
D
)
5
4
3
2
1
0
0
0.2
0.4
0.6
0.8
1
V
g
+ +
V D
M
(
D
)
0
0.2
0.4
0.6
0.8
1
0
1
2
3
4
5

Figure 4. Several basic dc-dc converters and their dc conversion ratios M(D) = V/V
g
. Analysis of converter waveforms
Under steady-state conditions, the voltage and current waveforms of a dc-dc converter can be
found by use of two basic circuit analysis principles. The principle of inductor volt-second balance states
that the average value, or dc component, of voltage applied across an ideal inductor winding must be zero.
This principle also applies to each winding of a transformer or other multiple winding magnetic devices. Its
dual, the principle of capacitor amp-second or charge balance, states that the average current that flows
through an ideal capacitor must be zero. Hence, to determine the voltages and currents of dc-dc converters
operating in periodic steady state, one averages the inductor current and capacitor voltage waveforms o