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Operational Amplifier Topologies and DC Specifications ©
1999 Microchip Technology Inc.
DS00722A-page 1
AN722
INTRODUCTION
Operational amplifiers (op amps) are as prolific in ana-
log circuits as salt and pepper is on food. They are
sprinkled throughout the sensor data acquisition sys-
tem, performing a variety of functions. For instance, at
the sensor interface, amplifiers are used to buffer and
gain the sensor output. The current or voltage excita-
tion to the sensor, quite often is generated by an ampli-
fier circuit. Following the front end sensor circuitry, an
op amp is used to implement a low pass, band pass or
high pass filter. In this portion of the circuit, gain stages
are also implemented using programmable gain ampli-
fiers or instrumentation amplifiers whose building
blocks are the op amp. Analog-to-Digital (A/D) convert-
ers are most typically driven by an amplifier in order to
achieve good converter performance.
Each one of these amplifier applications place unique
demands on the device, so that one performance spec-
ification may be critical in one circuit, but not necessar-
ily in another. This application note defines the DC
specifications of op amps and presents circuit applica-
tions where optimization of a particular specification is
critical.
DEFINING THE OP AMP
Ideal Specifications
The op amp can be simply defined as an analog gain
block with two signal inputs, two power supply connec-
tions and one output, as shown in Figure 1.
The input stage of the op amp has two terminals, the
non-inverting (V
IN+
) and inverting (V
IN-
) inputs. For the
ideal voltage feedback amplifier, both inputs are
matched having no leakage current, infinite input
impedance, infinite common mode rejection, zero noise
and zero offset voltage (V
OS
) between the terminals.
The power supply terminals (V
DD
and V
SS
) of the ideal
op amp, have no minimum or maximum voltage restric-
tions. Additionally, the current from the power supply
through the amplifier (I
SUPPLY
, I
DD
or I
Q
) is zero and any
variation in the power supply voltage does not intro-
duce errors into the analog signal path.
FIGURE 1: The ideal op amp description can be separated into four basic categories: input, power supply, output, and
signal transfer.
Author:
Bonnie C. Baker
Microchip Technology Inc.
V
IN
-
V
IN
+
V
OUT
V
DD
V
SS
OP AMP
INPUT Input Current (I
B
) = 0 Input Impedance (Z
IN
) =
Input Voltage Range (V
IN
)

no limits Zero Input Voltage and Current Noise Zero DC offset error (V
OS
) Common-Mode Rejection = POWER SUPPLY
No min or max Voltage (V
DD
, V
SS
)
I
SUPPLY
= 0 Amps
Power Supply Rejection Ratio (PSRR) = SIGNAL TRANSFER
Open Loop Gain (A
OL
)= Bandwidth = 0
Zero Harmonic Distortion (THD)
OUTPUT
V
OUT
= V
SS
to V
DD
I
OUT
=
Slew Rate (SR) = Z
OUT
= 0 Operational Amplifier Topologies and DC Specifications AN722
DS00722A-page 2
©
1999 Microchip Technology Inc.
In terms of the amplifier output, the swing capability
equals or exceeds the voltage restrictions of the power
supply. The output current (I
OUT
) of this terminal can be
infinite for indefinite periods of time, without causing
reliability or catastrophic failures. The speed (SR) at
which the output swings from rail to rail is instanta-
neous and the output impedance (Z
OL
or Z
CL
) is zero.
Finally, the open loop gain of the amplifier block is infi-
nite and the bandwidth of the open loop gain is also infi-
nite. To put the finishing touches on the signal transfer
characteristics of the ideal amplifier, signals pass
through the device without added distortion (THD) or
noise.
Technology Limitations
This ideal amplifier does not exist. Consequently, per-
formance specifications describe the amplifier so that
the designer can assess the impact it will have on his
circuit.
The errors that appear on the terminals of the op amp
are a consequence of the semiconductor process and
transistor implementation of the integrated circuit. In
terms of the impact of the type of process that is used
to design the amplifier, some generalities are summa-
rized in Figure 2. These generalities are just that and
not hard and fast rules.
FIGURE 2: Different IC processes render different
advantages for amplifiers. The choices in processes
for single supply amplifiers are Bipolar, CMOS and
BiFET, which is a combination of Field Effect
Transistors (FET) and Bipolar transistors.
For instance, the BiFET op amp is designed using an
FET (Field Effect Transistor) as the device at the input
terminals and Bipolar for the remainder of the circuit.
Op amp designed with this IC implementation have
higher slew rates as compared to the pure Bipolar
amplifier and CMOS amplifier.
In contrast, a pure Bipolar amplifier has NPN or PNP
transistors at the input terminals. This allows the IC
designer to achieve relatively low input offset voltage
and voltage noise between the input terminals as well
as higher open loop gains.
The commonality between the BiFET and Bipolar
amplifiers are that they typically have wider bandwidths
and higher output drive capability, as compared to the
CMOS amplifier.
CMOS, on the other hand is well known for its low
power, single supply op amps. The transistors in this
style of amplifier are CMOS, allowing for an infinite
input impedance and zero current leakage. This char-
acteristic is similar in BiFET amplifiers. The degrada-
tion of these input impedances and leakage currents
with the BiFET and CMOS input op amps are due to the
required electrostatic discharge (ESD) cells that are
added to the input terminals. CMOS amplifiers are also
capable of rail-to-rail operation (in analog terms) while
still having low quiescent current (current from the
power supply).
The op amp specifications can be separated into two
general categories, DC and AC. For the remainder of
this application note, only the DC specifications will be
discussed with accompanying detailed applications
where that specification has an impact on the circuit
performance. For discussions on AC specifications,
refer to the application note from Microchip entitled
Operational Amplifier AC Specifications and Applica-
tions, AN723. (
available December, 1999)
DC SPECIFICATIONS
The DC specifications discussed in this application
note are:
Input Offset Voltage (V
OS
)
Input Bias Current (I
B
)
Input Voltage Range (V
IN

or V
CM
)
Open Loop Gain (A
OL
)
Power Supply Rejection (PSRR or PSR)
Common-mode Rejection (CMRR)
Output Voltage Swing (V
OUT
, V
OH
, or V
OL
)
Output Resistance (R
OUT
, R
OL
, R
CL
, Z
OL
, or Z
CL
)
Power Supply and Temperature Range (V
SS
, V
DD
,
I
DD
, and I
Q
)
In Figure 3, these parameters are shown in their proper
locations to allow for easy circuit evaluation and error
analysis.
CMOS
BiFET
BiPOLAR

High Slew Rates

Low Voltage
Single Supply
Micropower
Rail-to-Rail
Very Low Noise
Low Offset Voltage
High Voltage Gain

High
Z
IN

Low Noise
Current
Stable Offset
Voltage
Wide BW
High Output
Drive ©
1999 Microchip Technology Inc.
DS00722A-page 3
AN722
FIGURE 3: DC parameters for the op amp are
modeled in a way to assist definition of specifications
and easy error analysis of circuits.
For the remainder of this application note, these DC
specifications will be defined and then evaluated within
a sensitive application.
Input Offset Voltage (V
OS
)
Specification Discussion - The input offset voltage
specification of an amplifier defines the maximum volt-
age difference that will occur between the two input ter-
minals in a closed loop circuit while the amplifier is
operating in its linear region. The input offset voltage is
always specified at room temperature in terms of µV or
mV. The over temperature specification can be guaran-
teed as

µV/°C as well as an absolute value of µV or mV.
Offset voltage is always modeled as a voltage source at
the non-inverting input of the amplifier, as shown in
Figure 3.
As with any amplifier specification, offset voltage can
vary from part to part and with temperature, as shown
in the distribution graphs in the Figure 4. The offset
voltage of a particular amplifier does not vary unless
the temperature, power supply voltage, common-mode
voltage or output voltage changes, as shown in
Figure 3 as part of V
ERR
. The affects of these changes
are discussed later.
FIGURE 4: The input offset voltage of an amplifier
varies from part to part but always falls within the
stated specification voltage range.
Application Challenge - The offset voltage error of a
particular amplifier may or may not be a problem,
dependent on the application circuit. For instance, if a
device is configured as a buffer (also known as a volt-
age follower), amplifiers with larger offset voltage
errors, in the range of 2mV to 10mV, are usually not sig-
nificantly different in performance than high precision
amplifiers with extremely low offset voltage specifica-
tions, in the range of 100µV to 500µV. On the other
hand, an amplifier with a high offset voltage that is in a
high closed loop gain configuration can dramatically
compromise the dynamic range of the circuit.
For example, the circuit in the Figure 5