a
b
55 C to 125 C temper-
ature range is described Instead of FETs the circuit used
bipolar transistors with current gains of 5000 so that offset
voltage and drift are not degraded A power consumption of
1 mW at low voltage is also featured
A number of novel circuits that make use of the low current
characteristics of the amplifier are given Further special
design techniques required to take advantage of these low
currents are explored Component selection and the treat-
ment of printed circuit boards is also covered
introduction
A year ago one of the loudest complaints heard about IC op
amps was that their input currents were too high This is no
longer the case Today ICs can provide the ultimate in per-
formance for many applications
even surpassing FET am-
plifiers
FET input stages have long been considered the best way
to get low input currents in an op amp Low-picoamp input
currents can in fact be obtained at room temperature How-
ever this current which is the leakage current of the gate
junction doubles every 10 C so performance is severely
degraded at high temperatures Another disadvantage is
that it is difficult to match FETs closely
1
Unless expensive
selection and trimming techniques are used typical offset
voltages of 50 mV and drifts of 50 mV C must be tolerated
Super gain transistors
2
are now challenging FETs These
devices are standard bipolar transistors which have been
diffused for extremely high current gains Typically current
gains of 5000 can be obtained at 1 mA collector currents
This makes it possible to get input currents which are com-
petitive with FETs It is also possible to operate these tran-
sistors at zero collector base voltage eliminating the leak-
age currents that plague the FET Hence they can provide
lower error currents at elevated temperatures As a bonus
super gain transistors match much better than FETs with
typical offset voltages of 1 mV and drifts of 3 mV C
Figure 1 compares the typical input offset currents of IC op
amps and FET amplifiers Although FETs give superior per-
formance at room temperature their advantage is rapidly
lost as temperature increases Still they are clearly better
than early IC amplifiers like the LM709
3
Improved devices
like the LM101A
4
equal FET performance over a
b
55 C to
125 C temperature range Yet they use standard transistors
in the input stage Super gain transistors can provide more
than an order of magnitude improvement over the LM101A
The LM108 uses these to equal FET performance over a
0 C to 70 C temperature range
In applications involving 125 C operation the LM108 is
about two orders of magnitude better than FETs In fact
unless special precautions are taken overall circuit perform-
ance is often limited by leakages in capacitors diodes ana-
TL H 6875 1
Figure 1 Comparing IC op amps with FET-input amplifier
log switches or printed circuit boards rather than by the op
amp itself
effects of error current
In an operational amplifier the input current produces a volt-
age drop across the source resistance causing a dc error
This effect can be minimized by operating the amplifier with
equal resistances on the two inputs
5
The error is then pro-
portional to the difference in the two input currents or the
offset current Since the current gains of monolithic transis-
tors tend to match well the offset current is typically a factor
of ten less than the input currents
TL H 6875 2
Figure 2 Illustrating the effect of source resistance on
typical input error voltage
Naturally error current has the greatest effect in high im-
pedance circuitry
Figure 2 illustrates this point The offset
voltage of the LM709 is degraded significantly with source
resistances greater than 10 kX With the LM101A this is
extended to source resistances high as 500 kX
The
LM108 on the other hand works well with source resistanc-
es above 10 MX
Reprinted from
EEE December 1969
C1995 National Semiconductor Corporation
RRD-B30M115 Printed in U S A High source resistances have an even greater effect on the
drift of an amplifier as shown in
Figure 3 The performance
of the LM709 is worsened with sources greater than 3 kX
The LM101A holds out to 100 kX sources while the LM108
still works well at 3 MX
TL H 6875 3
Figure 3 Degradation of typical drift characteristics
with high source resistances
It is difficult to include FET amplifiers in
Figure 3 because
their drift is initially 50 mV C unless they are selected and
trimmed Even though their drift may be well controlled (5
m
V C) over a limited temperature range trimmed amplifiers
generally exhibit a much higher drift over a
b
55 C to 125 C
temperature range At any rate their average drift rate
would at best be like that of the LM101A where 125 C
operation is involved
Applications that require low error currents include amplifi-
ers for photodiodes or capacitive transducers as these usu-
ally operate at megohm impedance levels Sample-and-
hold-circuits timers integrators and analog memories also
benefit from low error currents For example with the
LM709 worst case drift rates for these kinds of circuits is in
the order of 1 5 V sec The LM108 improves this to 3 mV
sec
worst case over a
b
55 C to 125 C temperature
range Low input currents are also helpful in oscillators and
active filters to get low frequency operation with reasonable
capacitor values The LM108 can be used at a frequency of
1 Hz with capacitors no larger than 0 01 mF In logarithmic
amplifiers the dynamic range can be extended by nearly 60
dB by going from the LM709 to the LM108 In other applica-
tions having low error currents often permits an entirely dif-
ferent design approach which can greatly simplify circuitry
the LM108
Figure 4 shows a simplified schematic of the LM108 Two
kinds of NPN transistors are used on the IC chip super gain
(primary) transistors which have a current gain of 5000 with
a breakdown voltage of 4V and conventional (secondary)
transistors which have a current gain of 200 with an 80V
breakdown These are differentiated on the schematic by
drawing the secondaries with a wider base
Primary transistors (Q
1
and Q
2
) are used for the input stage
and they are operated in a cascode connection with Q
5
and
Q
6
The bases of Q
5
and Q
6
are bootstrapped to the emit-
ters of Q
1
and Q
2
through Q
3
and Q
4
so that the input
transistors are operated at zero collector-base voltage
Hence circuit performance is not impaired by the low break-
down of the primaries as the secondary transistors stand
TL H 6875 4
Figure 4 Simplified schematic of the LM108
2 off the commom mode voltage This configuration also im-
proves the commom mode rejection since the input transis-
tors do not see variations in the commom mode voltage
Further because there is no voltage across their collector-
base junctions leakage currents in the input transistors are
effectively eliminated
The second stage is a differential amplifier using high gain
lateral PNPs (Q
9
and Q
10
)
6
These devices have current
gains of 150 and a breakdown voltage of 80V R
1
and R
2
are the collector load resistors for the input stage Q
7
and
Q
8
are diode connected laterals which compensate for the
emitter-base voltage of the second stage so that its operat-
ing current is set at twice that of the input stage by R
4
The second stage uses an active collector load (Q
15
and
Q
16
) to obtain high gain It drives a complementary class-B
output stage which gives a substantial load driving capabili-
ty The dead zone of the output stage is eliminated by bias-
ing it on the verge of conduction with Q
11
and Q
12
Two methods of frequency compensation are available for
the amplifier In one a 30 pF capacitor is connected from the
input to the output of the second stage (between the com-
pensation terminals) This method is pin-compatible with the
LM101 or LM101A It can also be compensated by connect-
ing a 100 pF capacitor from the output of the second stage
to ground This technique has the advantage of improving
the high frequency power supply rejection by a factor of ten
A complete schematic of the LM108 is given in the Appen-
dix along with a description of the circuit This includes such
essential features as overload protection for the inputs and
outputs
performance
The primary design objective for the LM108 was to obtain
very low input currents without sacrificing offset voltage or
drift A secondary objective was to reduce the power con-
sumption Speed was of little concern as long as it was
comparable with the LM709 This is logical as it is quite
difficult to make high-impedance circuits fast and low power
circuits are very resistant to being made fast In other re-
spects it was desirable to make the LM108 as much like the
LM101A as possible
TL H 6875 5
Figure 5 Input currents
Figure 5 shows the input current characteristics of the
LM108 over a
b
55 C to 125 C temperature range Not only
are the input currents low but also they do not change radi-
cally over temperature Hence the device lends itself to rel-
atively simple temperature compensation schemes that will
be described later
There has been considerable discussion about using Dar-
lington input stages rather than super gain transistors to
obtain low input currents
6 7
It is appropriate to make a few
comments about that here
Darlington inputs can give about the same input bias cur-
rents as super gain transistors
at room temperature How-
ever the bias current varies as the square of the transistor
current gain At low temperatures super gain devices have
a decided advantage Additionally the offset current of su-
per gain transistors is considerably low