age. In applications
requiring DC-DC conversion from a relatively high input voltage, a
switching regulator will dramatically improve conversion efficiency relative
to linear regulator alternatives. Two of the most common transformer based
DC-DC converter topologies are the Flyback and Forward. These topologies
are very effective for high input to output step-down ratios since the
transformer turns ratio can be set to accomplish the majority of the
step-down conversion. For example, the conversion equation for a Forward
converter is approximately: V
OUT
= V
IN
x D x Ns/Np
Where D is the duty cycle of the modulating switch, and Ns and Np are the
quantities of the transformer secondary and primary turns. For V
IN
= 66V
No. 117
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Feature Article................1-7
Emulated Current Mode
SIMPLE SWITCHER
®
Regulators............................2
WEBENCH
®
Tools for
SIMPLE SWITCHER
Designs ..............................4
PWM Buck Regulator........6
Power Design Tools..........8
Overcoming Challenges in Designing
Step-Down Regulator Applications
with 40V Input Voltage
By Robert Bell, Applications Engineer
Clock
Switch
Driver
R
S
Q
Switch
Current
Measure
1.25V
Reference
V
IN
V
OUT
Error AMP
PWM
Comparator
Q1
D1
L1
Figure 1. Buck Regulator Using Current Mode Control 2
Dial in Your Power Supply
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®
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Ideal for when you need to quickly design a power supply optimized for your design that is guaranteed
to work
Product ID
Eval Board ID
V
IN
Range (V)
V
OUT
(V) Min
I
OUT
(A)
f
SWITCH
Range
Packaging
LM5576
LM5576EVAL
6 to 75
1.225
3
50 kHz to 500 kHz
TSSOP20-EP
LM25576
LM25576EVAL
6 to 42
1.225
3
50 kHz to 1 MHz
TSSOP20-EP
LM5575
LM5575EVAL
6 to 75
1.225
1.5
50 kHz to 500 kHz
TSSOP16-EP
LM25575
LM25575EVAL
6 to 42
1.225
1.5
50 kHz to 1 MHz
TSSOP16-EP
LM5574
LM5574EVAL
6 to 75
1.225
0.5
50 kHz to 500 kHz
TSSOP-16
LM25574
LM25574EVAL
6 to 42
1.225
0.5
50 kHz to 1 MHz
TSSOP-16
New Emulated Current Mode (ECM) SIMPLE SWITCHER Line High V
IN
to low V
OUT
step-down ratios Superior transient response Fast design, guaranteed performance and flexibility
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®
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V
IN
V
IN
Switching
Frequency
ADJ
Switch
I
SENSE
V
OUT
LM25576
V
OUT and V
OUT
= 3.3 (20:1 step down) the transformer
turns ratio (Ns/Np) can be set to 1:10, requiring
the modulation switch duty cycle to be 50%. For a
500 kHz operation, the 50% duty cycle equates to
a switch on-time of 1 µs. For applications that do
not require ground isolation, a Buck regulator is a
more desirable topology. The buck topology pro-
vides a lower cost solution since it does not require
a transformer. The conversion equation for a buck
regulator is simply: V
OUT
= V
IN
x D
Buck regulator applications with a high input to
output step-down ratio require a small duty cycle.
Coupled with high-frequency operation, the
on-time for the modulating switch becomes very
small. The high frequency and high step down
ratio imposes significant challenges for the
pulse-width modulation (PWM) controller. A
buck regulator with V
IN
= 66V and V
OUT
= 3.3V
operating at 500 kHz will require an on-time of
100 ns.
Common modulation control methods often used
in buck regulators include Voltage Mode (VM),
Current Mode (CM), and Constant On-Time
(COT) control. Current-mode control provides
ease of loop compensation and inherent line
feed-forward compensation which make this
method a favorite among power designers. Voltage-
mode control is typically less noise sensitive but
under-performs current mode in transient response
and ease of stabilization. Constant On-Time
control eliminates most of the stability-related
issues and responds well to line and load transients.
However, COT controlled regulators do not
operate at constant switching frequency and
cannot be synchronized to an external clock.
Figure 1 shows the block diagram of a buck
regulator utilizing the current-mode control
method. The output voltage is monitored and
compared to a reference, with the resulting error
signal applied to the PWM. The origin of the
modulating ramp is where voltage mode and
current mode control differ. The modulating
ramp used in current mode control is a signal
proportional to the buck switch current. The
inductor current flows through the buck
switch during the switch on-time. During this
time, the inductor current waveform has a positive
slope of (V
IN
V
OUT
)/ L. An accurate, fast
measurement of the buck switch current is
necessary to create the modulating ramp signal.
The main disadvantage of current-mode control is
the difficulties encountered creating the buck
switch current signal.
Propagation delays and noise susceptibility make
it almost impossible to use conventional current-
mode control for high input voltage, large
step-down buck regulator applications where very
small on-times are required. Measuring the buck
switch current is challenging. The measurement
techniques commonly used are, make a voltage
measurement across a shunt resistor or the buck
switch on resistance or use a current mirror circuit
coupled to the buck switch. Each method requires
a level shift to transpose the measured signal down
to the ground reference for application to the
PWM comparator. Even with the best design prac-
tices, current sense and level shift circuits will add
a significant propagation delay. Another challenge
is, when the buck switch is turned on, the
free-wheel diode (D1) will turn off. A reverse
recovery current will flow through the diode and
the buck switch, causing a leading edge current
spike and an extended ringing period. This spike
can cause the PWM comparator to prematurely
trip, causing erratic operation. The most common
solution is to add filtering or leading edge blanking
to the current sense signal. Attempts to filter or
3
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Design Challenges In Step-Down Regulator Applications 4
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®
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®
Designs Flexible
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2. Optimize your design
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3. Analyze it
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Overlay alternate circuits and compare results to
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Design Challenges In Step-Down Regulator Applications
blank this leading-edge spike increase the
minimum controllable on-time of the buck switch.
Creating an Emulated Current Sense Signal
The challenge of accurate and fast buck switch
current measurement can be avoided with a new
method that emulates the buck switch current
without actually measuring the current. In a buck
regulator, the inductor current is the sum of the
buck switch current and free-wheel diode current,
as shown in Figure 2. The buck switch current
waveform can be broken down into two parts, a
base or pedestal and a ramp. The pedestal
represents the minimum inductor current value
(or valley) over the switching cycle. The inductor
current is at its minimum the instant the free-wheel
diode turns off, as the buck switch turns on.
The buck switch and the diode have the same
minimum current value, occurring at the valley of
the inductor current. A sample-and-hold measure-
ment of the free-wheel diode current, sampled just
prior to the turn-on of the buck switch can be used
to capture the pedestal level information.
The other part of the buck switch current
waveform is the ramp portion of the signal. The
voltage across the inductor is the difference
between the input (V
IN
) and output (V
OUT
)
voltages when the buck switch is on. This voltage
forces a positively ramping current through the
inductor and the buck switch. The ramping
current slope is equal to: di/dt = (V
IN
V
OUT
) / L.
An equivalent signal can be created with a voltage
controlled current source and a capacitor.
The rising voltage slope of a capacitor (C
RAMP
)
driven by a current source (I
RAMP
) is equal to:
dv/dt = I
RAMP
/ C
RAMP
. If the current source is set
proportional to the difference between the input
and output voltages the capacitor ramp slope is
equal to: dv/dt = K x (V
IN
V
OUT
) / C
RAMP
, where
K is a scale factor for the current source and C
RAMP
is the ramp capacitor. The value of C
RAMP
can be
selected to set the capacitor voltage slope
proportional to the inductor current slope.
Figure 3 presents the block diagram of the
LM25576, one of six new integrated buck