t face=arial size=-1 color=blue>
« back to results for ""
Below is a cache of http://www.chtechnology.com/pdfs/an990.pdf. It's a snapshot of the page taken as our search engine crawled the Web.
The web site itself may have changed. You can check the current page or check for previous versions at the Internet Archive. Yahoo! is not affiliated with the authors of this page or responsible for its content.
Application Characterization of IGBTs
INT990
Application Characterization of IGBTs
(HEXFRED
®
is a trademark of International Rectifier)
Topics Covered:
Gate drive for IGBTs
Safe Operating Area
Conduction losses
Statistical models
Switching losses
Device selection and optimization
Spreadsheets to calculate power losses and junction temperature
Thermal design
How to replace a power MOSFET
Paralleling
How to select devices for paralleling
Curve fitting methods to derive model parameters
SCOPE:
This application note covers some of the major issues normally encountered in the design of an IGBT power conditioning
circuit. It is the companion to INT-983, "IGBT Characteristics," which covers the details of the device, rather than its
application.
I. GATE DRIVE REQUIREMENTS
A . Impact of the impedance of the gate drive circuit on switching losses
The gate drive circuit controls directly the MOSFET channel
of the IGBT and, through the drain current of the MOSFET,
the base current of its bipolar portion. Since the turn-on
characteristics of an IGBT are determined, to a large extent,
by its MOSFET portion, the turn-on losses will be
significantly affected by the gate drive impedance. Turn-off
characteristics, on the other hand, are chiefly determined by
the minority carrier recombination mechanism, which is
only indirectly affected by the MOSFET turn-off. An
increase in gate drive impedance prolongs the Miller effect
and causes a delay in the current fall time that is similar to a
storage time. This delay is emphasized in Figure 1 with the
addition of a 47W gate resistor. The impact of the gate drive
impedance on total switching losses depends on the basic
design of the IGBT and its speed. The impact on turn-on
losses is appreciable for all IGBTs from International
Rectifier, regardless of speed. The impact on turn-off losses
depends on the speed of the device: the faster the IGBT the
greater its sensitivity to the gate drive impedance. In any
event, additional gate drive impedance has a marginal
impact, i.e. the same amount of additional drive impedance
will have a lower effect if the gate drive impedance is
already high.
It follows that the total switching losses of Fast IGBT will be less affected by the characteristics of the gate drive circuit than the
Ultrafast IGBTs. These last ones are more sensitive to it and stand to benefit the most from a low impedance gate drive. The
specific dependence of the switching energy on gate drive resistance is shown in the data sheet.
I
C
V
GE
V
CE
VCE : 100V/div.
IC : 5A/div.
VGE : 10V/div., 0.1
µ
µ
s/div.
Figure 1. Turn-off waveform of an IRGBC40F with
a 47W gate resistor. Notice the turn-off delay of
the current waveform during the Miller effect. INT990
B. Impact of the gate drive impedance on noise sensitivity
As explained in INT-936, in a MOS
Gated transistor, any dv/dt that
appears on the collector/drain is
coupled to the gate through a
capacitive divider consisting of the
Miller capacitance and the gate-to-
source/emitter capacitance. If the gate
is not solidly clamped to the
source/emitter, a large enough dv/dt
will take the gate voltage beyond its
threshold and the transistor will
conduct. As it goes into conduction it
clamps the dv/dt that is causing it to
conduct so that the gate voltage
never goes much beyond its
threshold. The end result is a limited
amount of "shoot-through" current,
with an increase in power dissipation.
To reduce noise sensitivity and the
risk of this dv/dt-induced turn-on,
the gate must be shorted to the
emitter through a very low impedance. Frequently a negative gate bias is used to improve noise immunity. An effective
alternative is to design a layout that minimizes the inductance of the gate charge/discharge loops with parallel tracks or twisted
wires for the gate drive.
This can be as effective in taking care of this problem as the negative bias, eliminating the need for isolated negative supplies.
In many cases the effects of a contained amount of dv/dt induced turn-on, i.e. a small increase in power dissipation, can be an
appealing alternative to the added complexity of the negative gate bias.
C. Impact of gate drive impedance on "dynamic latching"
Some manufacturers suggest the use of
significant amounts of gate resistance to reduce
the possibility of "dynamic latch-up" (see INT-
983, Section I.d), particularly when short circuit
currents have to be switched off. This increases
the switching energy and the sensitivity to dv/dt
induced turn-on. Under these conditions a
negative gate bias may be required.
Although IGBTs from International Rectifier
will not latch even with no gate resistance,
there may be practical reasons to add them,
mainly to reduce the current spike at turn-on
due to reverse recovery of the diode and reduce
ringing.
This resistance can be safely bypassed with an
anti-parallel diode to reduce the turn-off losses
and the amount of dv/dt induced turn-on, as
explained in INT-978, Section 3.b. For most
applications, the circuit shown in Figure 2
provides a simple, low cost, high performance
solution to the gate drive requirements of most
applications.
15V
0V
15V
0V
+15V
8 NC
9 V
DD
10 H
IN
11 SD
12 L
IN
13 V
SS
14 NC
7
HO
6
V
B
5
V
S
4
NC
3
V
CC
2
COM
1
LO
IR2110
V+
Figure 2. The IR2110 provides a simple, high performance, low cost
solution to the problem of driving a Half-Bridge.
V
CC
IN
ERR
V
SS
V
B
OUT
CS
V
S
C3
C1
C5
RS1
IR2125
V
CC
IN
ERR
V
SS
OUT
CS
V
S
C4
C2
C6
RS2
IR2121
V
CC
T1
C7
C8
V+
V-
IN1
IN2
V
CC
D1
Figure 3. Short circuit protection performed with
MOS gate driver ICs INT990
D. Using gate voltage to improve short circuit capability
The gate terminal can be advantageously used to control the short-circuit withstand capability of the IGBT. A lower gate drive
voltage reduces the collector current and the power dissipation during short circuit, at the expenses of a higher conduction drop.
As an alternative, simple circuits can be implemented to reduce the gate voltage within 1-3 ms from the inception of the short
circuit. INT-984 provides an example of how this function can be performed.
MOS-Gate Driver integrated circuits are available to perform the current limiting and short circuit protection function by means
of the gate voltage. One such example is shown in Figure 3.
E.
Contribution of "common emitter inductance" to the impedance of the gate drive circuit
The "common emitter inductance" is the inductance that is common to the collector circuit and the gate circuit (Figure 4a). This
inductance establishes a feedback from the collector circuit to the gate circuit that is proportional to Ldi
C
/dt. The voltage
developed across this inductance subtracts from the applied gate voltage during the turn-on transient and adds to it during turn-
off. In so doing, it slows down the switching.
This phenomenon is similar to the Miller effect, except that it is proportional to the di/dt of the collector current rather than the
dv/dt of its voltage. In both cases the feedback is proportional to the transconductance of the IGBT, which is much larger than
that of a MOSFET of the same die size. A di
C
/dt of 0.5A/ns is quite common in IGBT circuits and voltages in the order of 10V
could be expected in 20 nH of common emitter inductance, except that the feedback mechanism slows down the turn-on process
and limits the dic/dt.
No additional common emitter inductance should be added to what is already in the package. Separate wires to the emitter pin
should be provided for the emitter and the gate return, as shown in Figure 4b. The gate lead and the gate return lead should be
twisted or run on parallel tracks to minimize inductance in the gate drive path. This improves immunity to dv/dt induced turn-on
and reduces ringing in the gate.
F.
Gate charge vs. input capacitance
The difference between gate capacitance and gate charge is covered in INT-944. Designers that are familiar with the limited
usefulness of the input capacitance concept can safely skip this section.
Input capacitance is frequently used for two purposes:

as a figure of merit of switching performance;

as a reference point to design a gate drive circuit.
Z
a
LOAD
SUPPLY
LOAD CURRENT
COMMON EMITTER INDUCTANCE
PACKAGE
INDUCTANCE
GATE DRIVE
CURRENT
Figure 4a. " Common Emitter Inductance" is the inductance that
is common to the collector current and the gate drive current
Figure 4b. " Common Emitter Inductance" can be
eliminated by running separate wires to the emitter pin, one
for the emitter, the other for the gate drive return.
Z
a
LOAD
SUPPLY
LOAD CURRENT
TWISTED INT990
On both counts, the us