ck>Yahoo! is not affiliated with the authors of this page or responsible for its content.
Guide for the Design of Semiconductor Equipment to Meet Voltage Sag Immunity Standards
Guide for the Design of Semiconductor Equipment to Meet
Voltage Sag Immunity Standards
International SEMATECH
Technology Transfer # 99063760B-TR � 1999 International SEMATECH, Inc.
SEMATECH
and the SEMATECH logo are registered service marks of SEMATECH, Inc.
International
SEMATECH and the International SEMATECH logo are registered service marks
of International SEMATECH, Inc., a wholly-owned subsidiary of SEMATECH, Inc.
Product names and company names used in this publication are for identification purposes only
and may be trademarks or service marks of their respective companies. Guide for the Design of Semiconductor Equipment to Meet Voltage
Sag Immunity Standards
Technology Transfer # 99063760B-TR
International SEMATECH
December 31, 1999
Abstract:
This document summarizes the finding of testing to determine the immunity of semiconductor
equipment to voltage sag events. Based in part on the findings, global standards have been adopted
to define voltage sag immunity requirements for semiconductor equipment. As shown by the
research, effective power conditioning and embedded design solutions can significantly improve
the ability of equipment to ride through typical voltage sag events. The report conveys the basic
findings of the research with regard to test results, standards development, and effective mitigation
solutions. This document version contains corrected references to EPRI PEAC Corp.
Keywords:
Equipment Performance, Equipment Reliability, Standards, Power Supply
Authors:
Mark Stephens (EPRI PEAC Corp.), Dennis Johnson (TI), John Soward (TXU Electric), Jim
Ammenheuser (International SEMATECH)
Approvals:
Tom Wear, Facilities Manager
Jackie Ferrell, Standards Program Manager
Jim Ammenheuser, Project Manager
Dan McGowan, Technical Information Transfer Team Leader
iii
International SEMATECH
Technology Transfer # 99063760B-TR
Table of Contents
1
EXECUTIVE SUMMARY....................................................................................................... 1
1.1 Equipment Testing ............................................................................................................ 1
1.2 Power Quality Workshops ................................................................................................ 1
1.3 SEMI Standards Efforts .................................................................................................... 1
1.4 Conclusions....................................................................................................................... 1
2
INTRODUCTION..................................................................................................................... 2
2.1 Equipment Testing ............................................................................................................ 3
2.2 Power Quality Workshops ................................................................................................ 4
2.3 SEMI Standards Efforts .................................................................................................... 5
3
SUMMARY OF VOLTAGE SAG TEST RESULTS .............................................................. 5
3.1 Emergency Machine Off (EMO) Circuits ........................................................................ 6
3.2 DC Power Supply Response ............................................................................................. 8
3.3 Three-Phase Power Supplies ............................................................................................ 8
3.4 Vacuum Pumps ................................................................................................................. 8
3.5 Turbo Pumps..................................................................................................................... 9
3.6 AC Inverter Drives............................................................................................................ 9
4
ESTABLISHING A VOLTAGE SAG IMMUNITY STANDARD....................................... 10
4.1 Companion Test Methodology ....................................................................................... 14
5
EQUIPMENT DESIGN SOLUTIONS ................................................................................... 14
5.1 Selective Power Conditioning ........................................................................................ 15
5.1.1 Voltage Dip Proofing Inverter (DPI) ................................................................... 15
5.1.2 Constant Voltage Transformer (CVT) ................................................................. 16
5.1.3 The Uninterruptible Power Supply (UPS) ........................................................... 16
5.1.4 The Dynamic Sag Corrector (DySC). .................................................................. 16
5.1.5 Coil Hold-In Devices. .......................................................................................... 16
5.2 Embedded Solutions ....................................................................................................... 17
6
CONCLUSIONS..................................................................................................................... 19 iv
Technology Transfer # 99063760B-TR
International SEMATECH
List of Figures
Figure 1
Voltage Sags Described by Magnitude and Duration .................................................. 2
Figure 2
Breakout of Semiconductor Equipment Tested by Type ............................................. 4
Figure 3
Three-Legged Stool Concept ....................................................................................... 4
Figure 4
Typical Emergency Off Circuit (Simplified) ............................................................... 7
Figure 5
Phase Monitoring Relay............................................................................................... 7
Figure 6
General Purpose AC Powered Ice-Cube Relay is a Common Weak Link
Component in Vacuum Pump Control and Tool EMO Circuits.................................. 9
Figure 7
Motor Speed and Current During a Five-Cycle Voltage Sag (Flying Restart
Enabled) ..................................................................................................................... 10
Figure 8
Scatter Plot of Voltage Sag Event Data Considered by SEMI Task Force with
CBEMA 96 Curve Overlaid....................................................................................... 11
Figure 9
Disturbance Contour Plot with Equipment Tolerance Curves................................... 12
Figure 10 Voltage Sag Ride-Through Curve Proposed by the SEMI Standards Task
Force........................................................................................................................... 13
Figure 11 Common Selective Power Conditioning Devices ...................................................... 15
List of Tables
Table 1
Breakout of Semiconductor Tools Tested by Wafer Size............................................ 3
Table 2
SEMI Standards Task Force Activity Summary.......................................................... 5
Table 3
Most Common Reasons for Voltage Sag Related Tool Shutdown for 33
Evaluated Tools............................................................................................................ 6
Table 4
Selective Power Conditioning Equipment Comparison............................................. 17
Table 5
Phase-Neutral and Phase-to-Phase Voltage Sag Relationship ................................... 18 v
International SEMATECH
Technology Transfer # 99063760B-TR
Acknowledgements
This paper would not have been possible without the research and testing conducted by EPRI
and their participating member utilities who sponsored System Compatibility Research for the
semiconductor fabrication industry, including: Central Hudson, Green Mountain Power, TXU
Electric, SRP, Public Service New Mexico, San Diego Gas and Electric, and Duke Power.
Special thanks also to IBM, Intel, Motorola, TI, SEMATECH and the nine semiconductor
equipment suppliers who supported the research by actively participating in the research effort.
TXU Electric additionally should be recognized for directly supporting development of this
guide.
The authors also would like to thank SEMI Standards, the companies that supported standards
development, and the individual task force members who developed global standards for voltage
sag immunity. Companies with members on the SEMI Standards Power Quality Task Force
include Applied Materials, Lam Research, SCP Global, SVGL, FSI, AMD, IBM, Intel,
Motorola, National Semiconductor, Conexant, TI, SEMTECH, EPRI PEAC Corp., TXU
Electric, and SRP. The task force leaders, Michele Negley of SRP and Scott Repp of Intel, also
should be recognized, along with document development leaders Tom Key, EPRI PEAC Corp.,
John Soward, TXU Electric, Dan Toner, IBM, Mark Stephens, EPRI PEAC Corp., Bill Jones,
AMD, and Dennis Johnson, TI.
The authors would like to recognize the importance of workshops that brought together utilities,
semiconductor manufacturers, semiconductor equipment suppliers, and other interested parties to
find solutions to the issues of voltage sag immunity in the semiconductor industry. EPRI, SRP,
and TXU Electric supported industr