way how to drive a three way
multiplexed LCD with up to 36 segments using a 28-pin
COP800 device.
ABOUT MULTIPLEXED LCDS
There is a wide variety of LCDs, ranging from static devices
to multiplexed versions with multiplex rates of up to 1:256.
The multiplex rate of a LCD is determined by the number of
its backplanes (segment-common planes). The number of
segments controlled by one line (with one segment pin) is
equal to the number of backplanes on the LCD. So, a three
way multiplexed LCD has three backplanes and three seg-
ments are controlled with one segment pin. For example in a
three way multiplexed LCD with three segment inputs (SA,
SB, SC) one can drive a 7-segment digit plus two special
segments.
These are 3 x 3 = 7 + 2 = 9 segments. The special segments
can have an application specific image. (+, , ., mA,
etc).
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FIGURE 1. Schematic for LCD Triplex Driver
National Semiconductor
Application Note 953
Klaus Jaensch and Siegfried Rueth
September 1994
LCD
T
riplex
Drive
with
COP820CJ
AN-953
© 1999 National Semiconductor Corporation
AN012076
www.national.com A typical configuration of a triplex LCD is a four digit display
with 8 special segments (thus having a total of 36 seg-
ments). Fifteen outputs of the COP8 are needed; 4 x 3 seg-
ment pins and 3 backplane pins.
Common to all LCDs is that the voltage across backplane(s)
and segment(s) has to be an AC-voltage. This is to avoid
electrochemical degradation of the liquid crystal layer. A seg-
ment being off or on depends on the r.m.s. voltage across
a segment.
The maximum attainable ratio of on to off r.m.s. voltage
(discrimination) is determined by the multiplex ratio. It is
given by:
(V
ON
/V
OFF
)max = SQR((SQR(N) + 1)/(SQR(N) 1))
N is the multiplex ratio.
The maximum discrimination of a 3 way multiplexed LCD is
1.93, however, it is also possible to order a customized dis-
play with a smaller ratio. With the approach used in this ap-
plication note, it may not be possible to acheive the optimum
contrast acheived with a standard 3 way muxed driver. As a
result of decreased discrimination (1.93 to 1.73) the user
may have to live with a tighter viewing angle and a tighter
temperature range.
In this application you get a VrmsOFF voltage of 0.408
*
Vop
and a VrmsON voltage of 0.707
*
Vop. Vop is the operating
voltage of the LCD. Typical Vop values range from 3V5V.
With the optoelectrical curve of the LCD you can evaluate
the maximum contrast of the LCD by calculating the differ-
ence between the relative OFF contrast and the relative
ON contrast.
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FIGURE 2. Example: Backplane-Segment Arrangement
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In this example:
VrmsON = 0.707
*
Vop
VrmsOFF = 0.408
*
Vop
FIGURE 3. Example Curve: Contrast vs r.m.s. Drive Voltage
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2 The backplane signals are generated with the voltage steps
0V, Vop/2 and Vop at the backplanes; also see
Figure 4.
Two resistors are necessary for each backplane to establish
all these levels.
The backplane connection scheme is shown in
Figure 1.
The Vop/2 level is generated by switching the appropriate
COPs port pin to Hi-Z.
The following timing considerations show a simple way how
to establish a discrimination ratio of 1,732.
TIMING CONSIDERATIONS
A Refresh cycle is subdivided in 6 timephases.
Figure 4
shows the timing for the backplanes during the equal distant
timephases 05.
While the backplane control timing continuously repeats af-
ter 6 timephases, the segment control depends on the com-
bination of segments just being activated.
TABLE 1. Possible Segment ON/OFF Variations
Tiphtab
Address
Segment
A
Segment
B
Segment
C
0
off
off
off
1
on
off
off
2
off
on
off
3
on
on
off
4
off
off
on
5
on
off
on
6
off
on
on
7
on
on
on
Figures 5, 6, 7, 8, 9, 10, 11, 12 below show all possible com-
binations of controlling a Segment Triple with help of the
3 backplane connections and one segment pin. The seg-
ment switching has to be done according to the ON/OFF
combination required (see also
Table 1).
Each figure shows in the first 3 graphs the constant back-
plane timing.
The 4th graph from the top shows the segment control timing
necessary to switch the 3 segments (SA/SB/SC), activated
from one pin, in the eight possible ways.
The 3 lower graphs show the resulting r.m.s. voltages across
the 3 segments (SA, SB, SC).
Backplane Control
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Note: After timephase 5 is over the backplane control timing starts with
timephase 0 again.
FIGURE 4. Backplane Timing
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3 Segment/Backplane Control-Timing
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tiphtab address = 0
FIGURE 5.
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tiphtab address = 1
FIGURE 6.
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4 Segment/Backplane Control-Timing
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tiphtab address = 2
FIGURE 7.
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tiphtab address = 3
FIGURE 8.
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5 Segment/Backplane Control-Timing
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tiphtab address = 4
FIGURE 9.
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tiphtab address = 5
FIGURE 10.
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6 Segment/Backplane Control-Timing
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tiphtab address = 6
FIGURE 11.
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tiphtab address = 7
FIGURE 12.
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7 REFRESH FREQUENCY
One period with six timephases is called a refresh cycle
(also see
Figure 4).
The refresh cycle should be in a frequency range of 3060
Hz. A frequency below 30 Hz will cause a flickering display.
On the other hand, current consumption increases with the
LCDs frequency. So it is also recommended to choose a fre-
quency below 60 Hz.
In order to periodically update the µCs port pins (involved in
backplane or segment control) at the beginning of a new
timephase, the COP8 needs a timebase of typ. 4 ms which is
realized with an external RC-circuit at the G0/INT pin.
The G0 pin is programmable as input (Schmitt Trigger). The
conditions for the external interrupt could be set for a low to
high transition on the G0 pin setting the IPND-flag (external
interrupt pending flag) upon an occurrence of such a transi-
tion. The external capacitor can be discharged, with the G0
pin configured as Push/Pull output and programmed to 0.
When, switching G0 as input the Cap. will be charged
through the resistor, until the threshold voltage of the
Schmitt-Trigger input is reached. This triggers the external
interrupt. The first thing the interrupt service routine has to
do is to discharge the capacitor and switch G0 as input to re-
start the procedure.
This timing method has the advantage, that the timer of the
device is free for other tasks (for example to do an A/D con-
version).
The time interval between two interrupts depends on the RC
circuit and the threshold of the G0 Schmitt Trigger V
TH
.
The refresh frequency is independent of the clock frequency
provided to the COPs device.
The variations of threshold levels relative to V
CC
(over pro-
cess) are as follows:
(V
TH
/V
CC
) min = 0.376
(V
TH
/V
CC
) max = 0.572
at V
CC
= 5V
Charge Time:
T = (ln(1-V
TH
/V
CC
)
*
RC)
To prevent a flickering display one should aim at a minimum
refresh frequency of f
refr
= 30 Hz. This means an interrupt
frequency of f
int
= 6 x 30 Hz = 180 Hz. So, the maximum
charge up time T
max
must not exceed 5.5 ms (T
min
=
2.78 ms).
With the formula:
RC
max
=T
max
/(In(1(V
TH
/V
CC
)max))=5.5 msx0.849
RC
max
= 6.48 ms
(RC
min
= 5.98 ms)
The maximum RC time-constant is calculated. The minimum
RC time constant can be calculated similarly.
A capacitor in the nF-range should be used (e.g. 68 nF), be-
cause a bigger one needs too much time to discharge. To
discharge a 68 nF Cap., the G0 pin of the device has to be
low for about 40 µs.
On the other hand the capacitor should be large enough to
reduce noise susceptibility.
When the RC combination is chosen, one can calculate the
maximum refresh frequency by using the minimum values of
the RC constant and the minimum threshold voltage:
T
min
=RC
min
*
(In(1(V
TH
/V
CC
)min))=RC
min
*
0.472
and
f
refr,max
= f
int,max
/6 = 1/(T
min
*
6)
In the above example one timephase would be minimum
2.82 ms long. This means that about 250 instructions could
be executed during this time.
SOFTWARE
The software for the triplex LCD drive-demo is composed of
three parts:
1. The initialization routine is executed only once after reset-
ting the device, as part of the general initialization routine of
the main program. The function of this routine is to config-
ure the ports, set the timephase counter (tiphase) to
zero, discharge the external capacitor and enable the
external interrupt.
The initialization routine needs 37 bytes ROM.
Figure 13 shows the flowchart of this routine.
2. The update routine calculates the port-data for each time-
phase according to the BCD codes in the RAM locations
digit1 digit4 and the special segments. This routine is
only called if the display image changes.
The routine converts the BCD code to a list 1st, which is
used by the refresh routine.
Figure 14 gives an overview and
illustrates the data flow in this routine.
In
Figure 15 the data flow chart is filled with example data ac-
cording to the display image in
Figure 16.
First the routine creates the seg1st (4 bytes long), which
contains the on/off configuration of each segment of the
display. The display has 36 segments but the 4 bytes have
only 32 bits, so the four special segments S1 are stored in
the specbuf location. The bcdsegtab table (in ROM) con-
tains the LOOK-UP data for all possible Hex numbers from 0
to F.
The routine takes three bits at the beginning of each
time-phase from the seg1st.
These 3 bits address the 8 bytes of the tiphtab table in
ROM. Each byte