4 images)
Digital Filtering
Spectral analysis
Convolution/correlations
Polyphase filterbanks
Pulse compression
SAR processing
Features
Convection cooled PMC/PMC-X
Conduction cooling PMC/PMC-X -optional
Front panel IO daughter card
Up to four 32-bit complex floating point FFT/IFFT cores in parallel
with integrated address generators, IEEE-754 compliant
256 to 1M points transforms
256Mbytes of DDR2 SDRAM for data buffering, 40Mbytes of QDR2
SRAM and DDR2 SRAM for long vectors or 2D transforms
Embedded processor offers high level of programmability
Development kit and program examples provided
PCI-X, 32/64-bit 33/66MHz PCI interface
8 full-duplex Multi-Gigabit Transceivers on Front Panel daughter card
Figure 1 : 4FFTs FPGA architecture

May 2005
4FFT PMC/PMC-X Product brief
http://www.4dsp.com
Description
4FFT is a high performance conduction cooled
PMC/PMC-X module dedicated to applications that
require the processing of floating point Fourier
Transforms. Bundled with high speed interfaces, fast
on-board memory resources and one FPGA dedicated
to Digital Signal Processing algorithms, 4FFT is
typically utilized to accelerate frequency-domain
algorithms with several FFT/IFFT cores implemented
in parallel. Fully PMC and PMC-X compatible, 4FFT
can be used on any motherboard that complies with
either standard.
FFT core
Based on a radix-32 architecture, 4DSPs
floating point FFT/IFFT core provides unequaled
performances within the FPGA world with
integrated address generators and flexible
programmable transform lengths ranging from
256 to 1M points. Uniquely, up to four
FFT/IFFT cores can be implemented in parallel
in the XC4VLX160 Virtex-4 device along with
complex multipliers to perform functions such as
convolution and correlation. Table 1 gives an
overview of the performances that can be
achieved on 4FFT using several FFT/IFFT cores.


FFT/IFFT
transform size

# of cores
in parallel
Processing
time

Sustained
throughput
Internal/External
FPGA memory
256
4 1.4µs
181
MSPS
Internal
512
4 2.4µs
213
MSPS
Internal
1024
4 4.4µs
234
MSPS
Internal
2048
4 12.2µs
167
MSPS
Internal
4096

4 23.6µs

173 MSPS
Internal
8192

4 47.3µs

173 MSPS
Internal
16384

4 94.5µs

173 MSPS
Internal and External
32768

3 252µs

130 MSPS
Internal and External
65536

2 1ms

65 MSPS
External
131072

2 2ms

65 MSPS
External
262144

2 4ms

65 MSPS
External
524288

2 8ms

65 MSPS
External
1048576

2 16ms

65 MSPS
External
Table 1: Floating point FFT/IFFT performances on 4FFT with complex data input
Architecture and programmability
4FFTs FPGA architecture shown on Figure 1 has
been designed to offer flexibility combined with high
performances. A Microblaze embedded processor
executes the algorithm described in a users program.
It controls the non-blocking Switch Fabric and passes
settings to the IP cores and interfaces attached to it.
Data can flow from any source to any destination and
undergo the required transforms. The original
architecture featured in this document can be
modified upon request in order to meet specific
requirements.

Data types
All calculations are performed in 32-bit IEEE-754
floating point format. 4FFT can however accept fixed
point 2s complement formats on its inputs such as
16-bit integer or 32-bit integer.
FFT PMC/PMC-X Engine
4FFTs benchmark
The graph below shows a comparison between the
Cheetah PMC and 4FFTs performances. Please note that
the Cheetah PMC is a double-width PMC module
whereas 4FFT PMC/PMC-X is a single width module. If
two 4FFT cards were to be used, the 4FFTs figures
below can be doubled.
0.00E+00
5.00E+07
1.00E+08
1.50E+08
2.00E+08
2.50E+08
102
4
409
6
819
2
163843276
8
65536131072262144
FFT length
Throughput
i
n
M
S
P
S
4FFT PMC/XMC
Cheetah PMC
May 2005
4FFT PMC/PMC-X Product brief
http://www.4dsp.com

Figure 2: PMC/PMC-X block diagram
FFT PMC/PMC-X Engine
Front Panel IO daughter card
The FM480 provides a User Selectable daughter card for
Front Panel IO in accordance with IEEE 1386.1. A/D
converters with high digitization rates, D/A waveform
generators, LVDS, FPDP, extra memory resources (up to
512Mbytes SDRAM), camera link, video encoders and
decoders as well as many other standards or proprietary
interfaces provide connectivity to the system. The
maximum data bandwidth between the Virtex-4 and the
daughter card is 3Gbytes/s in LVDS mode. Eight Multi
Gigabit transceivers are also available on the daughter card.

Software support
4FFT is available with a full software support package,
including a development kit, program examples, drivers
and API.

Power
Max current at 5V: 4A
Max current at 3.3V: 4A

Interfaces to motherboard
PCI-X 64-bit 133MHz, 3.3V
PCI 64/32-bit 66MHz, 3.3V
PCI 64/32-bit 33MHz, 3.3V

Environment
Operating temperature:
0
°
C to +70
°
C (Commercial)
-40
°
C to +85
°
C (Industrial)
Optional conduction cooling
Convection cooling 600LFM minimum if conduction
cooling not used
4DSP Inc.
1757 Fox run road
Reno, NV 89523

Email
sales@4dsp.com
Virtex-4 is a trademark of Xilinx, Inc., 4FFT is a trademark of 4DSP, Inc.