e Reference Manual R
Xilinx University Program
Virtex-II Pro Development
System
Hardware Reference Manual
UG069 (v1.0) March 8, 2005 XUP Virtex-II Pro Development System
www.xilinx.com
UG069 (v1.0) March 8, 2005
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XUP Virtex-II Pro Development System
UG069 (v1.0) March 8, 2005
The following table shows the revision history for this document.
R
Version
Revision
03/08/05
1.0
Initial Xilinx release. (DRAFT) UG069 (v1.0) March 8, 2005
www.xilinx.com
XUP Virtex-II Pro Development System
Contents
Chapter 1: XUP Virtex-II Pro Development System
Features
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
General Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Virtex-II Pro FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Power Supplies and FPGA Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Multi-Gigabit Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
System RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
System ACE Compact Flash Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Fast Ethernet Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
User LEDs, Switches, and Push Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Expansion Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
XSGA Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
AC97 Audio CODEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
CPU Trace and Debug Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
USB 2 Programming Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Chapter 2: Using the System
Configuring the Power Supplies
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Configuring the FPGA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Clock Generation and Distribution
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Using the DIMM Module DDR SDRAM
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Using the XSGA Output
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Using the AC97 Audio CODEC and Power Amp
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Using the LEDs and Switches
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Using the Expansion Headers and Digilent Expansion Connectors
. . . . . . . . . . . 44
Using the CPU Debug Port and CPU Reset
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Using the Serial Ports
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Using the Fast Ethernet Network Interface
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Using System ACE Controllers for Non-Volatile Storage
. . . . . . . . . . . . . . . . . . . . . 65
Using the Multi-Gigabit Transceivers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 XUP Virtex-II Pro Development System
www.xilinx.com
UG069 (v1.0) March 8, 2005
Appendix A: Configuring the FPGA from the Embedded USB
Configuration Port
Appendix B: Programming the Platform FLASH PROM User Area
Appendix C: Restoring the Golden FPGA Configuration
Appendix D: Using the Golden FPGA Configuration for System Self-
Test
Hardware-Based Tests
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Power Supply and RESET Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Additional Hardware Required
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Test Procedure
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Clock, Push Button, DIP Switch, LED, and Audio Amp Test . . . . . . . . . . . . . . . . . . . . 99
Additional Hardware Required
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Test Procedure
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
SVGA Gray Scale Test . . . . . . . . . . . . . . . . . . . . . . . . . .