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AN-7517 Practical Aspects of Using PowerMOS Transistors to Drive Inductive Loads
©2002 Fairchild Semiconductor Corporation
Application Note 7517 Rev. A2
AN-7517
Practical Aspects of Using PowerMOS
Transistors to Drive Inductive Loads
Introduction
Many of the more recent applications of PowerMOS transis-
tors, particularly low voltage devices, have been as solenoid
drivers. In this type of application the device is simply used
as a switch to turn the current through a solenoid, relay or
other inductive load on and off (Figure 1). Since the dissipa-
tion is low, a very small or no heat sink will be required. This
note will cover the application of the rating and characteris-
tics of PowerMOS transistors to that type of application and
illustrate the process of selecting a suitable transistor.
Defining the Problem
The circuit used in most solenoid switch applications is very
simple. It simply consists of an inductor and resistance in
series with the drain and a gate drive circuit (Figure 2). Ana-
lyzing this circuit can lead to some simplifications that will
speed design efforts.
There are three circuit states that we should analyze. The
simplest state is when the PowerMOS transistor is off,
when the gate and source are at the same potential. Under
this condition the dissipation in the device is simply the leak-
age current times the supply voltage V
CC
. Usually this is
negligible. The second state we should consider is when the
gate drive is on. The PowerMOS transistor can best be rep-
resented as a series resistor. The current through that resis-
tor is:
The dissipation (P
T
) in the PowerMOS transistor while the
device is on is:
If we make the simplifying assumption that R
L
>> r
DS(ON)
this is:
where r
DS(ON)
is the worst case resistance of the PowerMOS
transistor at its operating junction temperature. PowerMOS
transistors all exhibit an increase in r
DS(ON)
with temperature.
Usually this is given in the form of a curve of r
DS(ON)
vs tem-
perature on the datasheet. The worst case r
DS(ON)
at any ele-
vated junction temperature is determined as follows. First,
using the r
DS(ON)
vs temperature curve for the device, obtain
the multiplicative factor at the expected operating junction
temperature. Finally multiply the maximum 25
o
C r
DS(ON)
rat-
ing by the previously determined factor.
The third state we should consider is when the switch transi-
tions from on to off or vice versa. In many solenoid switch
applications the major dissipation occurs while the Power-
MOS transistor is on, but turn on and turn off also dissipate
power in the transistor. The switching speed of most Power-
MOS transistors is so fast that turn on losses are usually
very small. An exception is when the drive current available
is very very small. Usually this does not occur in the real
world. For example the Fairchild RFP70N06 PowerMOS
transistor requires a maximum of 115nC of gate charge to
transition from off to fully on. For a gate drive which sup-
plies 1.0mA this would mean that the transition would take
less than 115
µ
s. This will make a negligible change in the
junction temperature of the PowerMOS transistor.
Turn-off subjects the PowerMOS transistor to Unclamped
Inductive Switching. Modern PowerMOS transistors can
withstand this type of stress and give clear ratings in their
datasheets to let customers calculate whether or not they
are operating within the devices capability. The energy dissi-
pated in the PowerMOS transistor each time the current is
interrupted is:
See Fairchild Application Note AN-7514.
Where:
Please note that the V
BRK
used here is the rated breakdown
voltage, since that is worst case, rather than the 1.3 x rated
breakdown voltage used in Application Note AN-7514.
I
T
V
CC
R
L
r
DS(ON)
+
----------------------------------
=
(EQ. 1.1)
P
T
I
T
( )
2
r
DS(ON)
×
=
(EQ. 1.2)
P
T
V
CC
R
L
------------
2
r
DS(ON)
×
=
(EQ. 1.3)
(EQ. 1.4)
E
T
L
I
T
×
V
DSS
×
R
L
------------------------------------
1
K In
×
1
1
K
----
+
×
=
K
V
BRK
V
CC I
T
R
L
×
----------------------------------
=
FIGURE 1. TYPICAL INDUCTIVE SWITCHING CIRCUIT
FIGURE 2. SOLENOID SWITCHING APPLICATION CIRCUIT
+
-
L
R
G
V
DD
V
GS
0V
+
-
L
R
G
V
DD
V
GS
0V
R
L
Application Note
October 1999
Title
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Application Note 7517 Rev. A2
The power dissipated in the device due to UIS will be directly
proportional to the number of times the interruption could
occur per second. If a human provides the interruptions, 5
times per second would probably be sufficient.
All of the losses in the PowerMOS transistor summed, multi-
plied by the total thermal resistance (junction to case, case
to heat sink and heatsink to ambient) gives the rise in junc-
tion temperature above the ambient. From that temperature
the operating r
DS(ON)
can be determined and the calcula-
tions iterated. Sometimes several iterations are required.
Example 1
The following example assumes a set of operating condi-
tions and computes the suitability of various Fairchild Power-
MOS devices to operate under those assumed conditions.
The assumed circuit conditions are:
L = 50mH, V
CC
= 16V, R
L
= 4 , IERC PSD1-2U Heat sink.
In addition, the following operational conditions are
assumed:
Rep Rate = 5 pulses/s, T
A
= 125
o
C, charged current
level 4A. Sufficient time was allotted for the inductor to
charge; we chose ten time constants (125ms). The inductor
also had to discharge to less than 1% of the charged current
level between pulses, and finally; 10ms of deadtime were
allotted between pulses.
Please note: the number of significant figures in all interme-
diate calculation values were truncated to aid readability.
Check UIS capability and verify junction temperature is less
than 175
o
C.
A. Try RFP3055
Assume T
J
= 175
o
C.
Check to be sure UIS stress is within RFP3055 capability.
(Reference AN-7514.)
Capability at 4.0A, 175
o
C is 0.04ms.
(Unit is not suitable for this application!)
B. Try RFP22N10
Assume T
J
= 175
o
C.
Check to be sure UIS stress is within RFP22N10 capability.
Capability at 4.0A, 175
o
C is 0.9ms.
(Unit is not suitable for this application!)
C. Try RFP45N06
Assume T
J
= 175
o
C.
Check to be sure UIS stress is within RFP45N06
capability.
Capability at 4.0A, 175
o
C is 3.2ms. OK for UIS.
Check to see if T
J
175
o
C.
Dissipation during conduction:
Dissipation due to UIS:
t
AV
L
R
L
-------
In
×
I
T
R
L
×
1.3
V
BRK
V
CC ×
------------------------------------------------
1
+
=
(EQ. 1.5)
t
AV
0.05
4
-----------
In
×
4
4
×
1.3
60
16 ×
----------------------------------
1
+
=
t
AV
2.9 ms
=
t
AV
L
R
L
-------
In
×
I
T
R
L
×
1.3
V
BRK
V
CC ×
------------------------------------------------
1
+
=
(EQ. 1.5)
t
AV
0.05
4
-----------
In
×
4
4
×
1.3
100
16 ×
-------------------------------------
1
+
=
t
AV
1.64 ms
=
t
AV
L
R
L
-------
In
×
I
T
R
L
×
1.3
V
BRK
V
CC ×
------------------------------------------------
1
+
=
(EQ. 1.5)
t
AV
0.05
4
-----------
In
×
4
4
×
1.3
60
16 ×
----------------------------------
1
+
=
t
AV
2.9 ms
=
r
DS(ON)
2.1
0.028
×
(See Figure 7, RFP45N06 datasheet.)
=
r
DS(ON)
0.059 =
P
T
V
CC
R
L
------------
2
r
DS(ON)
×
=
(EQ. 1.3)
P
T
16.0
4
-----------
2
0.059
×
=
P
T
0.941W
=
E
T
L
I
T
×
V
DSS
×
R
L
------------------------------------
1
K In
×
1
1
K
----
+
×
=
(EQ. 1.4)
Application Note 7517 ©2002 Fairchild Semiconductor Corporation
Application Note 7517 Rev. A2
Where
Dissipation due to UIS = E
T
x Rep Rate:
(
EQ. 1.6)
(Unit is not suitable for this application!)
But we could use a lower thermal resistance heat sink and
make it work.
C. Try RFP50N06
Assume T
J
= 175
o
C.
Check to be sure UIS stress is within RFP50N06
capability.
Capability at 4.0A, 175
o
C is 3.2ms. OK for UIS.
Check to see if T
J
175
o
C.
Dissipation during conduction:
Dissipation due to UIS:
Where
Dissipation due to UIS = E
T
x Rep Rate:
(EQ. 1.6)
OK for both UIS and T
J
.
K
V
DSS
V
CC I
T
R
L
×
----------------------------------
=
K
60
16 4
4
×
-------------------
=
K
2.75
=
E
T
0.05
4
×
60
×
4
----------------------------------
1
2.75
In 1.36
(
)
× [
]
×
=
E
T
0.441J
=
P
T
0.441
5
×
2.206W
=
=
P
TOTAL
0.941
2.206
+
3.147 W
=
= JA JC CHS HS
+
+
=
(EQ. 1.7) JC
1.14
o
C W (See page 2, RFP45N06 datasheet). = CHS
1.0
o
C W (estimated)
= HS
14.4
o
C W (IERC short form catalog dated 8/93.) = JA
16.54
o
C W = T
JUNCT ION JA
P
TOTAL
×
=
(EQ. 1.8) T
JUNCT ION
3.147
16.54
52.05
o
=
×
C
= T
JUNCT ION
125
52.1
+
177.1
o
C
=
=
t
AV
L
R
L
-------
In
×
I
T
R
L
×
1.3
V
BRK
V
CC ×
------------------------------------------------
1
+
=
(EQ. 1.5)
t
AV
0.05
4
-----------
In
×
4
4
×
1.3
60
16 ×
----------------------------------
1
+
=
t
AV
2.9 ms
=
r
DS(ON)
2.1
0.022
×
(See Figure 7, RFP50N06 datasheet.)
=
r
DS(ON)
0.046 =
P
T
V
CC
R
L
------------
2
r
DS(ON)
×
=
(EQ. 1.3)
P
T
16.0
4
-----------
2
0.046
×
=
P
T
0.739W
=
E
T
L
I
T
V
DSS
×
×
R
L
------------------------------------
1
K In
×
1
1
K
----