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Safe Operating Areas for Peripheral Drivers TL F 5860
Appendix
HSafe
Operating
Areas
for
Peripheral
Drivers
AN-213
National Semiconductor
Application Note 213
Bill Fowler
July 1986
Appendix H
Safe Operating Areas for
Peripheral Drivers
Peripheral Drivers is a broad definition given to Interface
Power devices The devices generally have open-collector
output transistors that can switch hundreds of milliamps at
high voltage and are driven by standard Digital Logic gates
They serve many applications such as Relay Drivers Print-
er Hammer Drivers Lamp Drivers Bus Drivers Core Memo-
ry Drivers Voltage Level Transistors and etc Most IC de-
vices have a specified maximum load such as one TTL gate
can drive ten other TTL gates Peripheral drivers have many
varied load situations depending on the application and re-
quires the design engineer to interpret the limitations of the
device vs its application The major considerations are
Peak
Current Breakdown Voltage and Power Dissipation
OUTPUT CURRENT AND VOLTAGE CHARACTERISTICS
Figure 1 shows the circuit of a typical peripheral driver the
DS75451 The circuit is equivalent to a TTL gate driving a
300 mA output transistor
Figure 2 shows the characteristics
of the output transistor when it is ON and when it is OFF
The output transistor is capable of sinking more than one
amp of current when it is ON and is specified at a V
OL
e
0 7V at 300 mA The output transistor is also specified to
operate with voltages up to 30V without breaking down but
there is more to that as shown by the breakdown voltages
labeled BVCES BVCER and LVCEO
TL F 5860 1
FIGURE 1 Typical Peripheral Driver DS75451
BVCES corresponds to the breakdown voltage when the
output transistor is held off by the lower output transistor of
the TTL gate as would happen if the power supply (V
CC
)
was 5V BVCER corresponds to the breakdown voltage
when the output transistor is held off by the 500 resistor as
would happen if the power supply (V
CC
) was off (0V)
LVCEO corresponds to the breakdown voltage of the output
transistor if it could be measured with the base open
LVCEO can be measured by exceeding the breakdown volt-
age BVCES and measuring the voltage at output currents of
1 to 10 mA on a transistor curve tracer (LVCEO is some-
times measured in an Inductive Latch-Up Test) Observe
that all breakdown voltages converge on LVCEO at high
currents and that destructive secondary breakdown voltage
occurred (shown as dotted line) at high currents and high
voltage corresponding to exceeding the power dissipation
of the device The characteristics of secondary breakdown
voltage vary with the length of time the condition exists
device temperature voltage and current
TL F 5860 2
FIGURE 2 Output Characteristics ON and OFF
OUTPUT TRANSFER CHARACTERISTICS VS
INDUCTIVE AND CAPACITIVE LOADS
Figure 3 shows the switching transfer characteristics super-
imposed on the DC characteristics of the output transistor
for an inductive load
Figure 4 shows the switching transfer
characteristics for a capacitor load In both cases in these
examples the load voltage (V
B
) exceeds LVCEO When the
output transistor turns on with an inductive load the initial
current through the load is 0 mA and the transfer curve
switches across to the left (V
OL
) and slowly charges the
inductor When the output transistor turns off with an induc-
tive load the initial current is I
OL
which is sustained by the
inductor and the transistor curve switches across to the
right (V
B
) through a high current and high voltage area
which exceeds LVCEO and instead of turning off (shown as
dotted line) the device goes into secondary breakdown It is
generally not a good practice to let the output transistors
voltage exceed LVCEO with an inductive load
In a similar case with a capacitive load shown in
Figure 4
the switching transfer characteristics rotate counter-clock-
wise through the DC characteristics unlike the inductive
load which rotated clockwise Even though the switching
transfer curve exceeds LVCEO it didnt go into secondary
breakdown Therefore it is an acceptable practice to let the
output transistor voltage exceed LVCEO but not exceed
BVCER with a capacitive load
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A TL F 5860 3
FIGURE 3 Inductive Load Transfer Characteristics
TL F 5860 4
FIGURE 4 Capacitive Load Transfer Characteristics
Figure 5 shows an acceptable application with an inductive
load The load voltage (V
B
) is less than LVCEO and the
inductive voltage spike caused by the initial inductive cur-
rent is quenched by a diode connected to V
B
TL F 5860 5
FIGURE 5 Inductive Load Transfer Characteristics
Clamped by Diode
Figure 6 shows the switching transfer characteristics of a
capacitive load which leads to secondary breakdown This
condition occurs due to high sustained currents not break-
down voltage In this example the large capacitor prevent-
ed the output transistor from switching fast enough through
the high current and high voltage region in turn the power
dissipation of the device was exceeded and the output tran-
sistor went into secondary breakdown
TL F 5860 6
FIGURE 6 Capacitive Load Transfer Characteristics
Figure 7 shows another method of quenching the inductive
voltage spike caused by the initial inductive current This
method dampens the switching response by the addition of
R
D
and C
D
The values of R
D
and C
D
are chosen to critically
dampen the values of R
L
and L
L
this will limit the output
voltage to 2
c
V
B
L
L
(R
L
a
R
D
)
c
0
1
L
L
C
D
s
0 5
TL F 5860 7
FIGURE 7 Inductive Load Dampened by Capacitor
Figure 8 shows a method of reducing high sustaining cur-
rents in a capacitive load R
D
in series with the capacitor
(C
L
) will limit the switching transistor without affecting final
amplitude of the output voltage since the IR drop across R
D
will be zero after the capacitor is charged
As an additional warning beware of parasitic reactance If
the drivers load is located some distance from the driver
(as an example on the inclosure panel or through a con-
2 necting cable) there will be additional inductance and ca-
pacitance which may cause ringing on the driver output
which will exceed LVCEO or transient current that exceeds
the sustaining current of the driver A 300 mA current
through a small inductor can cause a good size transient
voltage as compared with 20 mA transient current ob-
served with TTL gates For no other reason than to reduce
the noise associated with these transients it is good prac-
tice to dampen the drivers output
In conclusion transient voltage associated with inductive
loads can damage the peripheral driver and transient cur-
rents associated with capacitive loads can also damage the
driver In some instances the device may not exhibit failure
with the first switching cycle but its conditions from ON to
OFF will worsen after many cycles In some cases the de-
vice will recover after the power has been turned off but its
long term reliability may have been degraded
POWER DISSIPATION
Power Dissipation is limited by the IC Package Thermal
Reactance and the external thermal reactance of the envi-
ronment (PC board heat sink circulating air etc ) Also the
power dissipation is limited by the maximum allowable junc-
tion temperature of the device There are two contributions
to the power the internal bias currents and voltage of the
device and the power on the output of the device due to the
Driver Load
POWER LIMITATIONS OF PACKAGE
Figure 9 shows the equivalent circuit of a typical power de-
vice in its application Power is shown equivalent to electri-
cal current thermal resistance is shown equivalent to elec-
trical resistance the electrical reactance C and L are equiv-
alent to the capacity to store heat and the propagation de-
lay through the medium There are two mediums of heat
transfer conduction through mass and radiant convection
Convection is insignificant compared with conduction and
isnt shown in the thermal resistance circuits From the point
power is generated (device junction) there are three possi-
ble paths to the ultimate heat sink 1) through the device
leads 2) through the device surface by mechanical connec-
tion and 3) through the device surface to ambient air In all
cases the thermal paths are like delay lines and have a
corresponding propagation delay The thermal resistance is
proportional to the length divid