9 January 2004
1/18
This is preliminary information on a new product now in development. Details are subject to change without notice.
Rev. 2.0
ST7MC1/ST7MC2
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,
BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI DATA BRIEFING
s
Memories
8K to 60K dual voltage FLASH Program mem-
ory or ROM with read-out protection capabili-
ty. In-Application Programming and In-Circuit
Programming.
384 to 1.5K RAM
HDFlash endurance: 100 cycles, data reten-
tion: 20 years
s
Clock, Reset And Supply Management
Enhanced reset system
Enhanced low voltage supervisor (LVD) for
main supply and auxiliary voltage detector
(AVD) with interrupt capability
Clock sources: crystal/ceramic resonator os-
cillators and by-pass for external clock, clock
security system.
Four power saving modes: Halt, Active-Halt,
Wait and Slow
s
Interrupt Management
Nested interrupt controller
14 interrupt vectors plus TRAP and RESET
MCES top level interrupt pin
16 external interrupt lines (on 3 vectors)
s
Up to 60 I/O Ports
up to 60 multifunctional bidirectional I/O lines
up to 41 alternate function lines
up to 11 high sink outputs
s
5 Timers
Main Clock Controller with: Real time base,
Beep and Clock-out capabilities
Configurable window watchdog timer
Two 16-bit timers with: 2 input captures, 2 out-
put compares, external clock input, PWM and
pulse generator modes
8-bit PWM Auto-Reload timer with: 2 input
captures, 4 PWM outputs, output compare
and time base interrupt, external clock with
event detector
s
2 Communication Interfaces
SPI synchronous serial interface

LIN
SCI asynchronous serial interface
s
Motor Control Peripheral
6 high sink PWM output channels
Asynchronous emergency stop
4 analog inputs for rotor position detection
Operational amplifier and comparator for cur-
rent limitation
s
Analog peripheral
10-bit ADC with 16 input pins
s
In-circuit Debug
s
Instruction Set
8-bit Data Manipulation
63 Basic Instructions
17 main Addressing Modes
8 x 8 Unsigned Multiply Instruction
True Bit Manipulation
s
Development Tools
Full hardware/software development package
Device Summary
TQFP64
14 x 14
TQFP80
14 x 14
TQFP32
7 x 7
SDIP56
TQFP44
10 x 10
Features
ST7MC1
ST7MC2
Program memory - bytes
8K
16K/24K
32K
48K
60K
RAM (stack) - bytes
384 (256)
768 (256)
1024 (256)
1536 (256)
1536 (256)
Peripherals
Watchdog, 16-bit Timer A, LINSCI , 10-bit ADC, MTC, 8-bit PWM ART, ICD
-
SPI, 16-bit Timer B
Operating
Supply vs. Frequency
4.5 to 5.5V with f
CPU 8MHz
Temperature Range
-40°C to +85°C
/ -40°C to +125°C
-40°C to +85 °C
Package
TQFP32
TQFP44
SDIP56/TQFP64
TQFP64
TQFP80
1 ST7MC1/ST7MC2
2/18
1 INTRODUCTION
The ST7MCx

device is member of the ST7 micro-
controller family designed for mid-range applica-
tions with a Motor Control dedicated peripheral.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set and are available with FLASH, ROM or
FASTROM program memory.
Under software control, all devices can be placed
in WAIT, SLOW, ACTIVE-HALT or HALT mode,
reducing power consumption when the application
is in idle or stand-by state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
The devices feature an on-chip Debug Module
(DM) to support in-circuit debugging (ICD). For a
description of the DM registers, refer to the ST7
ICC Protocol Reference Manual.
Figure 1. Device Block Diagram
8-BIT CORE
ALU
A
D
D
R
ESS
AN
D
D
A
T
A
BU
S
OSC1
V
PP
CONTROL
PROGRAM
(8K - 60K Bytes)
V
DD
RESET
PORT D
PD7:0
(8-bits)
TIMER A
10-BIT ADC
PORT A
RAM
(384 - 1536Bytes)
PORT B
MCC/RTC/BEEP
1
V
AREF
V
SSA
PORT E
1
TIMER B
1
PE5:0
(6-bits)
MTC VOLT INPUT
PA7:0
1)
(8-bits)
PORT F
1
PF5:0
(6-bits)
SPI
1
PB7:0
(8-bits)
V
SS
WATCHDOG
OSC
LVD
OSC2
MEMORY
SCI/LIN
AVD
PWM ART
PORT C
(8-bits)
MOTOR CONTROL
PC7:0
PORT G
1)
PORT H
1)
PG7:0
1)
(8-bits)
PH7:0
1)
(8-bits)
MCES
DEBUG MODULE
1 ST7MC1/ST7MC2
3/18
2 PIN DESCRIPTION
Figure 2. 80-Pin TQFP 14x14 Package Pinout
2
1
3
4
5
6
7
8
10
9
12
14
16
18
20
11
15
13
17
19
25
26
28
27
30
32
34
36
38
29
33
31
35
37
39
57
58
56
55
54
53
52
51
49
50
47
45
43
41
48
44
46
42
60
59
61
62
63
64
66
68
65
67
69
70
71
72
74
73
75
76
77
78
79
80
PD3 / ICAP1_A / AIN13
PD2 / ICAP2_A / AIN12
PD1 (HS) / OCMP1_A
PF0 / MCDEM / AIN8
V
DD_0
VSS_0
VSSA
PD0 / OCMP2_A / AIN11
PH3
PH2
PH1
PF4 (HS)
PF1 / MCZEM / AIN9
PG1
PG2
PG3
OSC1
AIN2 / PA7
VDD_1
PG0
OSC2
PWM3 / PA0
PWM2 / (HS) PA1
PWM1 / PA2
AIN0 / PWM0 / PA3
ARTCLK / (HS) PA4
AIN1 / ARTIC1 / PA5
ARTIC2 / PA6
(HS) MCO3
(HS) MCO4
(HS) MCO5
PG
4
PG
5
(
H
S)
PC
0
AI
N
5
/
M
C
C
F
I 0
/
P
C
1
MC
PW
MU
/
P
C
5
MISO
/
PB4
AI
N
3
/
MO
S
I
/
PB5
SC
K /
(
H
S)
PB6
AIN
4
/
S
S
/
(
H
S
)
PB7
O
AP /
P
C
2
O
A
N

/ P
C
3
AIN
6
/
M
C
C
F
I 1
/

O
A
Z
40
MC
P
W
MV/
PC
6
21
22
24
23
MC
V
R
EF
/
PB0
M
C
IA /
PB1
M
C
IB /
PB2
M
C
IC
/ P
B
3
V
PP/I
C
C
S
EL
PE
5

P
E
4 /

E
X
T
C
L
K
_B
MC
O
2
(
H
S)
MC
O
1
(
H
S)
MC
O
0
(
H
S)
RESET
PF3 (HS) / BEEP
PF5 (HS)
PH0
PG
6
PG
7
VAREF
PC7 / MCPWMW / AIN7
MC
C
R
EF
/
PC
4
P
E
3
/

I
C
A
P
1_B

PH
7
PH
6
PH
5
PE2
/
IC
A
P
2
_
B
PE1
/
O
C
MP1
_
B
PE0
(
H
S)
/
O
C
M
P
2
_
B
PH
4
PD
7
(
H
S)
/
T
D
O
PD
6
(
H
S)
/
R
D
I
PD
5
/
AIN
1
5
/
IC
C
D
AT
A
VD
D
_
2
VSS_
2
PD
4
/
E
XT
C
L
K_
A /
AIN
1
4
/
IC
C
C
L
K

PF2 / MCO / AIN10
VSS_1
ei0
ei2
ei2
ei1
ei1
(HS) 20mA high sink capability
eix
associated external interrupt vector
MCES
1 ST7MC1/ST7MC2
4/18
Figure 3. 64-Pin TQFP 14x14 Package Pinout
MISO
/
PB4
AI
N
3
/
MO
SI
/
PB5
SC
K

/ (
H
S)
PB6
AI
N
4
/
SS
/
(
H
S
)

PB7
(
H
S)
PC
0
AI
N
5
/
M
C
C
F
I0
/ P
C
1
O
A
P /
PC
2
O
A
N
/ P
C
3
AIN
6

/ M
C
C
F
I1
/
O
A
Z
M
C
CRE
F
/
P
C
4
M
C
PW
M
U
/
PC
5
MC
PW
MV/
P
C
6
MC
VR
EF
/
PB0
M
C
I
A
/
PB1
M
C
I
B
/
PB2
M
C
IC
/
PB3
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17 18 19 20 21 22 23 24
29 30 31 32
25 26 27 28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
ei2
ei0
ei1
V
SS
_1
V
DD
_1
OSC1
OSC2
PWM3 / PA0
PWM2 / (HS) PA1
PWM1 / PA2
AIN0 / PWM0 / PA3
ARTCLK / (HS) PA4
AIN1 / ARTIC1 / PA5
ARTIC2 / PA6
AIN2 / PA7
(HS) MCO3
(HS) MCO4
(HS) MCO5
MCES
PF5 (HS)
PF4 (HS)
PF3 (HS) / BEEP
PF2 / MCO / AIN10
PF1 / MCZEM / AIN9
PF0 / MCDEM / AIN8
RESET
V
DD_0
V
AREF
V
SSA
V
SS_0
PC7 / MCPWMW / AIN7
PD3 / ICAP1_A / AIN13
PD2 / ICAP2_A / AIN12
PD1 (HS) / OCMP1_A
PD0 / OCMP2_A / AIN11
PE5
/
PE4
/
EXT
C
L
K_
B
PE3
/
IC
AP1
_
B

PE2
/
IC
AP2
_
B
PE1
/
O
C
MP1
_
B

PE0
(
H
S
)
/
O
C
MP2
_
B
V
DD
_2
V
SS
_2
PD
7
(
H
S)

/ T
D
O
PD
6
(
H
S)

/ R
D
I

PD
5
/
AI
N
1
5
/
I
C
C
D
AT
A
PD
4
/EXT
C
L
K_
A /
AI
N
1
4
/
I
C
C
C
L
K
MC
O
2
(
H
S)
MC
O
1
(
H
S)
MC
O
0
(
H
S)
V
PP
/
IC
C
S
E
L
(HS) 20mA high sink capability
eix
associated external interrupt vector
ei1
1 ST7MC1/ST7MC2
5/18
Figure 4. 56-Pin SDIP Package Pinouts
52
51
50
49
48
47
46
45
44
43
42
41
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
53
54
55
56
(HS) MCO1
(HS) MCO0
V
PP
/ICCSEL
ICAP1_B / PE3
ICAP2_B / PE2
OCMP1_B / PE1
21
20
17
18
19
MCES
(HS) MCO5
(HS) MCO4
(HS) MCO3
(HS) MCO2
40
39
38
37
36
23
22
28
27
24
25
26
35
34
33
32
31
30
29
OSC2
OSC1
Vdd_1
Vss_1
PWM2 / (HS) PA1
AIN0 / PWM0 / PA3
ARTCLK / (HS) PA4
AIN1 / ARTIC1 / PA5
ARTIC2 / PA6
MISO / PB4
AIN3 / MOSI / PB5
SCK / (HS) PB6
AIN4 / SS /(HS) PB7
MCVREF / PB0
MCIA / PB1
MCIB / PB2
MCIC / PB3
PF3 (HS) / BEEP
PF1 / MCZEM / AIN9
PF0 / MCDEM / AIN8
RESET
V
DD_0
V
AREF
V
SSA
V
SS_0
PC7 / MCPWMW / AIN7
PD3 / ICAP1_A / AIN13
PD2 / ICAP2_A / AIN12
PD1 (HS) / OCMP1_A
PD0 / OCMP2_A / AIN11
PE0 (HS) / OCMP2_B
V
DD
_2
V
SS
_2
PD7 (HS) / TDO
PD6 (HS)

/ RDI
PD5 / AIN15 / ICCDATA
PD4 /EXTCLK_A / AIN14 / ICCCLK
OAZ / MCCFI1 / AIN6
PC4 / MCCREF
PC3 / OAN
PC2 / OAP
PC6 / MCPWMV
PC5 / MCPWMU
PC1 / MCCFI0/AIN5
PC0(HS)
ei0
ei2
ei1
ei1
ei2
(HS) 20mA high sink capability
eix
associated external interrupt vector
1 ST7MC1/ST7MC2
6/18
Figure 5. 44-Pin TQFP Package Pinouts
MISO
/
PB4
AIN
3
/ M
O
SI

/ PB5
SC
K /
(
H
S)
PB6
AI
N
4
/ S
S
/(
H
S
)

PB7
O
A
P /
PC
2
O
A
N
/
PC
3
A
I
N
6

/
M
C
C
F
I1
/ O
A
Z
MC
C
R
EF
/
PC
4
M
C
IA /
PB1
M
C
IB /
PB2
M
C
IC
/ P
B
3
44 43 42 41 40 39 38 37 36 35 34
33
32
31
30
29
28
27
26
25
24
23
12 13 1