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Microsoft PowerPoint - 2-3-QCCC Classical Control for Quantum
Computers
Mark Whitney, Nemanja Isailovic,
Yatish Patel, John Kubiatowicz
U.C. Berkeley
Quantum Computing is Hard
Qubit decoherence
Physical isolation from environment
Error correction correcting error correction!
Decoherence-free subspaces
Quantum Computing is Harder!
Complex physical interactions = complex
pulse sequences
Nanoscale geometries
Atomic interactions on the order of 10nm
Cold operating temperatures
1 Kelvin reduces thermal noise
These issues make control circuitry
difficult!
Must account for in QC design
Skinner-Kane Si based computer
Silicon substrate
Qubit =
phosphorus ion spin +
donor electron spin
A-gate
Hyperfine interaction
Electron-ion spin swap
S-gate
Electron shuttling
Global magnetic field
Spin precession
Universal set of gates
Si substrate
A
-GA
TE
S
-GAT
E
S
-GA
TE
P ion
P ion
electron
electron
global B
measurement
SETs
A
-GA
TE Quantum wires
Ions are stationary
Qubits are moved by swapping
Alternating swap gives us wires
Some qubits move right, some left
Quantum wires seem more complicated
than classical
S
A
S
S
A
S
S
S
S
S S
A
A
. . .
. . .
1
2
3
4
2
1
4
3
0
4
1
5
0
4
5
1
S
A
S
S
A
S
Swap cell
A lot of steps for two qubits!
e
1-
e
2-
e
2-
e
1-
e
2-
e
2-
e
2-
Electron-ion spin swap
e
2-
e
2-
e
2-
e
1-
e
2-
e
1-
e
2-
e
1-
e
1-
e
1-
Electron-ion spin swap
e
1-
e
1-
e
1-
e
2-
e
1-
P ion 1
P ion 2
S
A
S
S
A
S
S
S
S
S
S
A
A
. . .
. . .
Swap Cell Control What a mess! Long pulse sequence
e
1
-
e
2
-
S
1
A
1
S
2
S
3
A
2
S
4
e
1
-
e
1
-
e
2
-
e
2
-
e
2
-
e
1
-
e
1
-
e
2
-
e
1
-
e
2
-
e
1
-
e
2
-
e
1
-
e
2
-
e
1
-
e
2
-
e
1
-
e
2
-
e
1
-
e
2
-
e
1
-
e
2
-
e
1
-
e
2
-
e
2
-
e
1
-
S
1
S
2
S
3
A
1
S
4
A
2
24
24
Step 1
2
3
4
5
6
7
8
9
10
El
ectr
odes
11
12 13 14
Electron-ion spin swap
Time
Control
signals
Electrons are too close
Pulse Sequence for 2-D
2-D layout (mentioned
in Kane 00) moves
electrons in parallel
Simpler control
Better electron
separation
Control signals still
complicated!
S-gate cascade
A-gate sequence
S
1
S
2
S
3
A
1
,A
2
24
A
1
A
2
S
1
S
3
S
3
S
2
S
1
S
2
e
1-
e
1-
e
1-
e
1-
e
2-
e
2-
e
2-
e
2-
. . .
. . . Pulse Characteristics
Clock rate
Electron-ion interaction period:
88.3ps -> 11.3GHz clock rate
Voltage swing
Slower qubit manipulation
Lower voltage swing = lower voltage
differential
Slew rate
A-/S-gates must charge in clock period
. . .
e
-
. . .
. . .
e
-
. . .
. . .
e
-
Qubit layout
voltage swing
(V
max
) adjusts
d
qubit
Tuned for desired error rate
slew rate
and
clock period
adjusts
d
Si
Lowers electrode to back gate capacitance
Other technologies? (SOI)

Pulse characteristics effect quantum datapath
0V
0V
d
Si
Gate Electrodes
V
max
d
qubit
Single-electron transistors (SETs)
CMOS does not work at 1K operating temperature
SETs work well at low temperatures
Electrons move 1-by-1 through tunnel junction onto
quantum dot and out other side
Low drive current (~5nA) and voltage swing (~40mV)
Affects our error and slew rates
Tunnel Junction
V
DD
V
DD
Control Input
Island
C
LOAD
Y. Takahashi et. al.
Swap control circuit
S-/A-gate pulse
sequences complex
What would a circuit
schematic look like?
S
1
S
2
S
3
A
1
,A
2
24
A
1
A
2
S
1
S
3
S
3
S
2
S
1
S
2
e
1-
e
1-
e
1-
e
1-
e
2-
e
2-
e
2-
e
2-
. . .
. . . 5-bit counter
0
1
2
3
4
Reset
Enable
8-bit counter
Reset
1
2
3
4
5
6
7
0
D
D
D
D
D
D
D
D
D
D
D
D
D
D
S
1a
S
1b
S
1c
S
1d
S
2a
S
2b
S
3a
S
3b
S
3c
S
3d
S
4a
S
4b
T
D
S
1a
S
1b
S
1c
S
1d
S
1 on
S
3a
S
3b
S
3c
S
3d
S
3 on
S
2a
S
2b
S
2 on
S
4a
S
4b
S
4 on
A
a
S
1 on
S
2 on
S
3 on
S
4 on
A
a
A
on
Swap control circuit II
Off-on A-gate pulse subsequence (2 off, 254 on)
A-gate pulse repeats 24 times
Can this even be built with SETs?
S-gate pulse cascade
Large!
Control circuit area,
~10um
2
Aggressive process,
30nm feature size
Minimal design
Swap cell area,
~0.068um
2
Will not fit!
S
1
S
2
S
3
A
1
,A
2
24
A
1
A
2
S
1
S
3
S
3
S
2
S
1
S
2
e
1-
e
1-
e
1-
e
1-
e
2-
e
2-
e
2-
e
2-
. . .
. . .
In SIMD we trust?
Large control circuit/small swap cell ratio = SIMD
Like clock distribution network
Clock skew at 11.3GHz?
Error correction?
Swap
Control
A
A
S
1
S
3
S
3
S
2
S
1
S
2
A
S
3
S
2
S
1
S
2
A
S
3
S
2
S
1
S
2
A
S
3
S
2
S
1
S
2
A
A
S
1
S
3
S
3
S
2
S
1
S
2
A
S
3
S
2
S
1
S
2
A
S
3
S
2
S
1
S
2
A
S
3
S
2
S
1
S
2
.
.
.
.
.
.
.
.
.
.
.
.
Why on-chip?
Why not run many wires
in from outside?
Error correction
complicates
Requires conditional
swapping
1000 qubits
* 336 swaps/lvl 1 ECC
* 4 signals/qubit in swap
= 1344000 wires!
ECC could mean trouble
for SIMD in general
1,000,000 wire bus! Conclusions
Pulse sequences for quantum gates are
complex
!
All quantum computing technologies
require complex pulse sequences
Must keep control circuit in mind for large-
scale integration