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A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no miller capacitors - Solid-State Circuits, IEEE Journal of IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 2, FEBRUARY 2003
237
A Robust Feedforward Compensation Scheme for
Multistage Operational Transconductance Amplifiers
With No Miller Capacitors
Bharath Kumar Thandri and José Silva-Martínez, Senior Member, IEEE
AbstractA multistage operational transconductance amplifier
with a feedforward compensation scheme which does not use
Miller capacitors is introduced. The compensation scheme uses
the positive phase shift of left-half-plane (LHP) zeroes caused
by the feedforward path to cancel the negative phase shift of
poles to achieve a good phase margin. A two-stage path increases
further the low frequency gain while a feedforward single-stage
amplifier makes the circuit faster. The amplifier bandwidth is
not compromised by the absence of the traditional pole-splitting
effect of Miller compensation, resulting in a high-gain wide-band
amplifier. The capacitors of a capacitive amplifier using the
proposed techniques can be varied more than a decade without
significant settling time degradation. Experimental results for
a prototype fabricated in AMI 0.5- m CMOS process show dc
gain of around 90 dB and a 1% settling time of 15 ns for a load
capacitor of 12 pF. The power supply used is
1.25 V.
Index TermsAnalog circuits, feedforward techniques, multi-
stage amplifiers, operational transconductance amplifiers (OTA),
phase compensation.
I. I
NTRODUCTION
T
HE EVER-INCREASING demand for more performance
from monolithic analog and mixed-mode signal-pro-
cessing circuits poses challenging requirements on the basic
building block: the operational transconductance amplifier
(OTA). High-end applications such as analog-to-digital (A/D)
converters and switched-capacitor filters require fast settling
and precise amplifiers. The step response of a capacitive loaded
amplifier, shown in Fig. 1, consists of two phases, the initial
slew phase and the settling phase. The latter phase is determined
by the gain-bandwidth product (
of the amplifier and,
in many practical cases, dominates the overall settling time. If
the slew phase is neglected, the amplifiers pulse response is
approximately given by
(1)
In this expression, the effective unity-gain frequency is given by
(2)
Manuscript received April 16, 2002; revised August 23, 2002.
The authors are with the Analog and Mixed-Signal Center, Department
of Electrical Engineering, Texas A&M University, College Station, TX
77843-3128 USA (e-mail: jsilva@ee.tamu.edu).
Digital Object Identifier 10.1109/JSSC.2002.807410
Fig. 1.
Typical OTA-based capacitor amplifier.
Fig. 2.
Step response of an amplifier with sufficient phase margin.
In these equations,
is the ideal amplifier gain,
is the feedback factor and
is the open-loop dc gain of the amplifier. The error in the final
value is inversely proportional to the dc gain of the amplifier,
as shown in Fig. 2. A high-performance amplifier should have
high
(for fast settling) and high dc gain (for an accu-
rate final value). It is very difficult to design an amplifier with
both high gain and high bandwidth because of contradicting de-
sign requirements. High-gain amplifiers use multistage designs
with long channel length transistors biased at low current levels.
High-bandwidth amplifiers use single-stage designs with short
channel length transistors biased at high current levels [1]. Cas-
cading individual gain stages gives a high-gain amplifier, but
each stage introduces a low-frequency pole, which produces
negative phase shift and degrades the overall phase margin. The
phase margin of the open-loop amplifier should be at least 45
for stable operation in closed loop. Many phase-compensation
schemes for multistage amplifiers have been reported in the lit-
erature [2][7]. These reported schemes are a variation of the
basic Miller compensation scheme for a two-stage amplifier. In
0018-9200/03$17.00 © 2003 IEEE 238
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 2, FEBRUARY 2003
Fig. 3.
Block diagram of basic NCFF compensation scheme for two-stage amplifier.
a Miller compensated amplifier, the dominant pole is pushed to
lower frequencies due to the Miller effect (pole splitting), re-
sulting in lower bandwidth structures. Also, a right-half-plane
(RHP) zero is created which degrades the phase response. A
nulling resistor is usually used to cancel the effect of the RHP
zero. Other reported schemes use the positive phase shift of a
left-half-plane (LHP) zero created by a feedforward path to im-
prove the phase response [2], [4], but all of these still use Miller
capacitors. Recently, active feedforward techniques have been
used for the design of multistage amplifiers. In [11], a theoretical
analysis on the effects of feedforward networks is presented, and
in [12], the technique is used for the design of low-frequency in-
strumentation amplifiers.
The compensation scheme used in this paper employs a feed-
forward path to create LHP zeros, but does not use any Miller
capacitor. The dominant pole is not pushed to lower frequen-
cies, resulting in a higher gain-bandwidth product with a fast
step response. The proposed compensation scheme is described
in Section II. The effects of polezero mismatch on the perfor-
mance of the amplifier are discussed in Section III. It is shown
that the proposed technique is robust even if the integrating and
load capacitors are varied by more than a decade. Section IV
describes the circuit implementation. The simulation and exper-
imental results are discussed in Section V, and conclusions are
drawn in Section VI.
II. N
O
-C
APACITOR
F
EEDFORWARD
(NCFF) C
OMPENSATION
S
CHEME FOR
M
ULTISTAGE
A
MPLIFIERS
The proposed NCFF compensation scheme alleviates the
drawbacks of Miller compensation schemes. The block diagram
of the NCFF scheme is shown in Fig. 3. The compensation
scheme uses the positive phase shift of LHP zeros, created by
a feedforward path, to compensate the negative phase shift due
to the poles. The polezero pair is created at high frequencies
to avoid slow settling components associated with polezero
cancellation at low frequencies [8]. The main concept can be
explained by assuming a single-pole response for the three
blocks.
,
, and
are the dc gains of the first, second,
and feedforward stages of the amplifier. The pole of the first
stage is located at
and the second and third
(a)
(b)
Fig. 4.
Amplifier frequency response and polezero locations in open and
closed loop. (a) Perfect polezero cancellation. (b) Polezero mismatch.
stages have a common pole at
. The overall
amplifier voltage gain is
(3)
The OTA transfer function has two poles and a LHP zero created
by the feedforward path. The dc gain is given by THANDRI AND SILVA-MARTÍNEZ: ROBUST FEEDFORWARD COMPENSATION SCHEME FOR MULTISTAGE OTAS WITH NO MILLER CAPACITORS
239
Fig. 5.
NCFF compensation scheme for
n-stage amplifier.
and the dominant pole is located at
. The location of the LHP
zero is
(4)
Notice that the location of the LHP zero is approximately at
times the gain-bandwidth product of the first stage, where
. The second and feedforward stages can be designed
such that the negative phase shift due to
is compensated by
the positive phase shift of the LHP zero. When the frequency of
exactly coincides with that of the LHP zero, the amplifier
phase margin is 90 and the unity-gain frequency is given by
. The open- and closed-loop transfer
functions for perfect and imperfect polezero cancellation are
shown in Fig. 4(a) and (b), respectively. The implications of
polezero mismatch are discussed in Section III.
This compensation scheme results in an amplifier with high
gain and fast response. The bandwidth improvement is due to
the fact that the poles are not split, as is the case in any am-
plifier with Miller compensation. There can be a substantial re-
duction in area and power, especially as compared to multistage
amplifiers, which use two or more capacitors for phase compen-
sation. If the nondominant pole of the first stage is also consid-
ered, then the resulting transfer function has three poles and two
LHP zeros. In general, the number of LHP zeros created by the
feedforward path is equal to the order of the first stage. The main
restriction here is that the nondominant pole of the feedforward
and second stage must be placed after the overall unity-gain
bandwidth of the amplifier in order to minimize phase degrada-
tion. This compensation scheme can be extended for a generic
-stage amplifier, as shown in Fi