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The New "Power-Smart" Power Paradigm
The New "Power-Smart"
Power Paradigm
White Paper
July 2007
July 2007 2
The New "Power-Smart" Power Paradigm
Abstract
The next few years will bring great changes in the way our society views the high-tech community. We're in
the early stages of a transition that will result in recognition of the electronics industry as a major
contributor to the resolution of the world's global warming problems. To date, companies are talking about
power reduction initiatives, but more can be done. From the design of "power-smart" chips and systems to
the development of industry-wide power efficiency guidelines, the new power paradigm calls for the
electronics industry to take responsibility for reducing energy consumption, improving power efficiency and
ultimately, reducing greenhouse gasses.
Power in a Changing World
In the 1990s, "power" was discussed in relation to supplying power to a system or providing volts and
amps to a PC card. And, for most people, "low power" was about a few power-conscious products that
looked good on paper, but often saw little success.
Power in semiconductor devices takes two basic forms: static and dynamic. Static power is consumed
when the part is not doing any useful work, while dynamic power is consumed when the device is actively
working. Until recently, dynamic power was the dominant source of power consumption. Once helping to
manage the dynamic power problem, device supply voltages (V
CC
) had scaled downward with process
shrinks and subsequent lower system voltages, but the days of continued scaling are gone. Additionally,
the physics associated with integrated circuits (ICs) on smaller process geometries have dramatically
increased power related to leakage. And, with leakage worsening, static power has begun to dominate the
power consumption equation as the biggest concern (
Figure 1
).
Figure 1
illustrates the increasing contribution of static power at shrinking process nodes.
Figure 1: Static Power Significant at 90 nm The New "Power-Smart" Power Paradigm
3
Another dramatic change from the 1990s is the proliferation of electronics in our society. Yesterday, we
used pen and paper to interact, inform, and communicate. Today, we use electronic devices, such as the
Apple iPhone
�
and Palm Treo smart phones. As the trend toward portable electronics continues, the
world is less willing to buy equipment, like desktop PCs, that has to be plugged into a wall socket. Wasting
nearly half of the power delivered to them and increasing the cost of power, today's desktop PCs are a
perfect example of the need for low-power offerings.
Unfortunately, the generation of the electricity required to power electronic systems contributes to a
surprisingly high proportion of the greenhouse gasses associated with global warming, a real and serious
issue. According to a United Nations report issued in May 2007, the average global temperature will rise by
as much as 11�F by the turn of the century, even with an aggressive program aimed at minimizing this rise.
As a result, companies are talking about reducing energy usage across the power continuumfrom chips
to systemswith the goal of helping to protect the environment. Though environmentally friendly steps
have been taken, such as lead-free initiatives and RoHS compliance, the electronics industry has not
adequately addressed the power issue. And, whereas the presence of small quantities of lead in
electronics devices does indeed present a problem, its scope is minimal compared to the disastrous effects
that could come if we fail to control global warming.
For example, it is interesting to note that no Environmental Protection Agency (EPA) Energy Star�
guidelines exist for semiconductors to date. Though these semiconductor products directly contribute to
the power efficiency and management of Energy Star-rated products, the industry has not yet rallied
around an approach to benchmarking power efficiency for "low-power" ICs. Well-conceived requirements
for semiconductors would enable boards, systems, and end products to minimize energy consumption,
improve power efficiency, and reduce greenhouse gasses.
Certainly, a part of the solution to the problem lies in the hands of the electronics industry. With today's
power-smart technologies, more can be done. Taking responsibility is mandatoryno longer a choice. The
new "power" means a coordinated attack on power consumptionfrom chips to systems.
Power-Smart Chips
Designers of portable, battery-powered equipment are faced with a daunting challengeinsatiable
consumer demand for smaller, cheaper, feature-rich portable devices with longer battery lives, lower cost,
and short time to market. The longer the battery life, the lower the cost of ownership for consumers. If the
battery life of a smart phone is good for six hours, and if lithium ion batteries typically support 300500
recharge cycles before a "costly" battery replacement is required, would not these devices be even more
attractive if the battery life was extended beyond six hours to weeks or months?
Designers have traditionally relied on application-specific integrated circuits (ASICs) to support the low-
power consumption that portable designers require. But ASICs come with their own baggage, namely
expensive mask sets and longer time to market. Alternatively, programmable logic solutions, particularly
those based on SRAM technology, have provided the shortened time to market but with inherently high
static power consumption. In fact, some of today's "low-power" field-programmable gate arrays (FPGAs)
and complex programmable logic devices (CPLDs) draw upwards of 30 mA, which is often an order of
magnitude or two higher than typical battery-operated applications can tolerate.
SRAM-based devices also experience power surges at startup that can cause battery drain or possible
system-initialization failures. Compounding the issue further, each process node shrink means additional
static power consumption for transistor-heavy, SRAM-based FPGAs. This is due to worsening problems
like quantum tunneling and sub-threshold leakage, which create real challenges for devices targeted to
portable applications. The power problem becomes further confused when considering new SRAM-based
solutions that utilize flash technology to program the chip's SRAM architecture. Though marketed as flash- 4
The New "Power-Smart" Power Paradigm
based devices, these solutions must add additional circuitry to the already power-hungry SRAM FPGA
fabric.
Fortunately, "true flash" programmable logic technologies exist. Because nonvolatile, flash-based FPGAs
do not use millions of power-hungry SRAM configuration bit cells, they have significantly lower static power
than SRAM-based solutions, making them ideal for low-power applications. In fact, some available flash-
based FPGAs have been designed expressly for low-power applications. With static power as low as
5 �W, these FPGAs deliver more complexity and features with four times lower static power and as much
as five times longer battery life in portable applications than CPLDs.
Compared with today's "low-power" best-of-breed, SRAM-based FPGAs, Actel's flash-based IGLOO
FPGAs deliver between 100 and 1,000 times improvement in power reduction. The two to three orders of
magnitude lower static power consumption can translate into weeks and months of standby battery life. For
designers of battery-operated portable applications, other advantages of flash-based devices include
flexible power saving modes with rapid recovery to operation, low dynamic power consumption, and clock
management.
Power-smart chips can offer more than low-power consumption. They also can be used to intelligently
control and reduce total power consumption in the overall system. For example, the mixed-signal Actel
Fusion Programmable System Chip (PSC) offers the integration of FPGA logic with other elements used
in system management, such as flash, analog, microprocessors, and clock management. This integration
enables designers to remove parts from the board, reduce total power consumption and bill-of-materials
(BOM) costs, and enable sophisticated power management of the system.
Power-Smart Systems
Generally, when designing a system, a power goal is set. Often, however, if the designer "approximately"
meets this specification, little additional effort is expended to improve the design, leaving watts on the
table. Because electronic systems are sold by the hundreds of millions, a few watts of inefficiency in each
system eventually translates into staggering amounts of resources being consumed unnecessarily, which
ultimately has a detrimental impact on the environmental. Unfortunately, there is usually no easy way to
track power down to the individual components or voltage rails, making the job of removing all
unnecessary power from devices a difficult task. There is also rarely a way to measure voltages, currents,
and temperatures when the system is in operation, which complicates the ability to recognize when things
are going badly.
The proliferation of new standards, such as Advanced Telecommunications Computer Architecture