gi
t LED
Dis
p
lay Desi
gn
Usi
ng
MM74C91
1 and M
M
74C912 Dis
p
lay Contr
o
ll
ers
AN-257
Simplified Multi-Digit LED Display Design Using
MM74C911 and MM74C912 Display Controllers
Introduction
The MM74C911 and MM74C912 are CMOS display con-
trollers that control multiplexing of 8-segment LED dis-
plays. These devices each have an on-chip multiplex
oscillator and associated logic to easily implement multi-
digit displays with minimal additional hardware. These con-
trollers were designed to be easily interfaced to a micropro-
cessor as a small 4- or 6-byte area of write-only memory
(WOM), but they are not limited to this environment.
The MM74C911 is the simplest of these devices. It has one
data input for each of its eight segment outputs, allowing
direct control of any LED segment. The MM74C912 has
five data inputs which accept BCD data, plus decimal point.
The MM74C911 can interface up to four 8-segment dis-
plays and the MM74C912 can control up to six 8-segment
displays.
Functional Description MM74C911
The functional block diagram for the MM74C911 is shown
in Figure 1. The eight data inputs are buffered and bussed
to the four dual-port latches. To write data into a particular
latch, K1 and K2 address inputs are decoded and the
proper latch is enabled when CE and WE are taken LOW.
The latch outputs are controlled by the multiplexer (MUX)
logic. All four latch data outputs are commonly bussed, and
are sequentially read by the MUX logic. The bussed 8-seg-
ment outputs are then buffered by bipolar segment driver
transistors, which are enabled when SOE is low, and are in
3-STATE mode when Segment Output Enable (SOE) is
held HIGH. This allows easy display blanking without loss
of data.
The multiplexer logic controls all of the timing for the
MM74C911 and also generates the digit output strobes.
The timing diagram is shown in Figure 2.
FIGURE 1. MM74C911 Block Diagram
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Functional Description MM74C911
(Continued)
FIGURE 2. MUX Timing for MM74C911
By raising the Digit In-Out (DIO) input HIGH, the internal
oscillator is disabled and the digit outputs become inputs
which control reading of the 4-digit latches. This allows the
MM74C911 to be slaved to other multiplex timing signals. If
both SOE and DIO are held HIGH, both the display and
oscillator are disabled causing the MM74C911 to be in a
LOW-power mode where it typically draws less than 1
�
A.
Table 1 shows the Truth Table for these control inputs.
TABLE 1. Operating Modes for the
MM74C911/MM74C912
(*The MM74C911 Digit Outputs become Inputs)
Functional Description MM74C912
The functional block diagram for the MM74C912 is shown
in Figure 3. This device is very similar to the MM74C911.
There are only five data inputs on the MM74C912 which
are buffered, then bussed to six 5-bit dual-port latches. The
address present on K1, K2, and K3 will dictate which of the
six latches will be loaded when both CE and WE are LOW.
The outputs of all of the latches are commonly bussed and
fed into a decoder ROM which converts BCD (MM74C912)
code to seven segment. The fifth bit is the decimal point,
which bypasses the ROM. The 8-segment bits are then
buffered by eight NPN-segment drivers. Like the
MM74C911, these outputs are 3-STATE and will blank the
display when SOE is held HIGH.
All of the multiplexing is controlled by an internal oscillator
and control logic. The logic sequentially reads each latch
and activates the digit outputs. The oscillator can be dis-
abled by raising the Oscillator Enable (OSE) input HIGH,
but the digit outputs do not become inputs and thus the
MM74C912 can not be slaved. However, by raising both
SOE and OSE HIGH, this part can be put into a LOW-
power mode similar to the MM74C911. Figure 1 shows the
controller operating modes.
The ROM outputs are shown in Figure 4.
DIO /OSE
SOE
Mode
0
0
NORMAL DISPLAY MODE
0
1
DISPLAY BLANKED
1
0
WILL DISPLAY ONE DIGIT*
1
1
LOW POWER MODE 3
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AN-
257
Display Interface Design
Common Cathode LEDs
Since the MM74C911/MM74C912 contain all the multiplex
circuitry necessary to operate a 4- or 6-digit display, all the
designer must do is choose appropriate segment resistors
and digit drivers to properly illuminate the LEDs. A typical
LED connection is shown in Figure 5. Based on the
selected display, a certain segment current will be required.
This current will determine the value of the segment resis-
tor and the type of digit driver necessary. The design for the
MM74C911 is nearly the same as for the MM74C912
except that due to multiplexing the 6-digit controllers must
be designed to a higher peak current value.
FIGURE 3. MM74C912 Display Controller
FIGURE 4. MM74C912 Character Fonts www.fairchildsemi.com
4
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Display Interface Design
(Continued)
(a)
(b)
FIGURE 5. Typical LED Connections for (a) MM74C912 (b) MM74C911
As an example, suppose the NSN781 (2-digit, 0.7 common
cathode LED display) has been selected. These displays
require an average current of 8 mA per segment for good
illumination. The MM74C911 multiplexes four digits; thus,
any one digit is on 1/4 of the time. Each digit must have a
peak current four times its average current to achieve the
same brightness. The MM74C911 must supply about
32 mA per segment, and the MM74C912 would have to
supply a current six times the average current or about
48 mA.
The maximum digit driver current is the maximum number
of on segments multiplied by the segment current. For the
MM74C911 design, the digit current is 260 mA, and is 380 mA for the MM74C912. Using this digit current value,
the digit driver can be selected. Figure 2 shows possible
digit driver ICs, but discrete transistors or Darlingtons may
also be used, and may be desirable in some higher current
applications. It is also important to keep in mind that the
output voltage of the driver at the designed current, as this
voltage can affect the display controllers current drive. For
most designs, an output voltage of
<
2V is reasonable.
Once the digit driver has been chosen and the output volt-
age at the desired current is known, the segment resistor,
R
SEG
can be calculated using:
where V
LED
is the voltage across the LED, 1.8V; V
DO
is the
digit driver output voltage at the chosen current; I
SEG
is the
peak segment current; and V
SEG
is the MM74C911 or
MM74C912 segment driver output voltage at the peak seg-
ment current, which can be determined from the curves in
Figure 6. 5
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Display Interface Design
(Continued)
In most cases, R
SEG
can be more quickly determined from
Figure 7 which plots R
SEG
vs. average segment current.
These curves are plotted for various digit driver output volt-
ages using current values from Figure 6. Thus, for the
above example, if a DS75492 driver I.C. is used with the
MM74C911 to interface to the NSB781 LEDs R
SEG

=
38 assuming the drivers output voltage is 1.0V. Note that
Table 2 tabulates minimum output drive where the above
V
DO
is an approximation of the DS75492s typical V
DO
at
260 mA.
TABLE 2. Typical LED Digit Drivers and Their Characteristics

FIGURE 6. Typical Segment Driver Current vs. Output Voltage for (a) MM74C911 (b) MM74C912
(a)
(b)
FIGURE 7. Average LED Segment Current vs. Segment Resistor for (a) MM74C911 (b) MM74C912
Part Number
Driver Type
Number of
Minimum
Drivers
Output Drive
DS75492
Darlington Driver
6
250 mA @ 1.5V
DS75494
Multiple Transistor Driver
6
150 mA @ 0.35V
DS8646
Transistor Driver
6
84 mA @ 0.55V
DS8658
Transistor Driver
4
84 mA @ 0.55V
DS8870
Darlington Driver
6
350 mA @ 1.4V
DS8871/2
Transistor Driver
8/9
40 mA @ 0.5V
DS8877
Transistor Driver
6
35 mA @ 0.5V
DS8920
Transistor Driver
9
40 mA @ 0.5V
DS8963
Darlington Driver
8
500 mA @ 1.5V
DS8978
Transistor Driver
9
100 mA @ 0.7V
DS8692
Transistor Driver
8
350 mA @ 1.0V www.fairchildsemi.com
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Display Interface Design
(Continued)
Table 3 and Table 4 tabulate some typical segment resistor
values for various Fairchild LED displays. (See Optoelec-
tronics Databook for detailed specifications.) This table
was compiled for a well lit room, but variation in ambient
lighting may require some slight modification in the typical
segment resistor values.
If a transistor digit driver is being used, it is sometimes
desirable to use a base current limiting resistor between
the controllers output and the transistors base. This will
help limit the power dissipation of the display controller in
critical situations. The digit resistor, R
DIG
, can be calculated
using:
where V
DI
is the digit driver input voltage, 0.7V for a tran-
sistor, I
DI
is the desired digit driver current and V
DIG
is the
controllers digit output voltage for the chosen current
which can be found from Figure 8.
When the MM74C911 is to be used as a master to drive
another MM74C911 or other logic, the digit outputs must
have a high output voltage of 3.0V to drive another
MM74C911 or 3.5V to drive standard CMOS logic. The
digit resistor should be
>
300 for V
OH
3.0V and R
DIG

>
350 for V
OH
3.5V.
A final design consideration is power dissipation. When
designing a low-power system where the total current is to
be minimized, the total system power consumption is sim-
ply:
P
T
V
CC
(I
DO

+
I
DI
)
where I
DO
is the maximum digit driver output current, V
CC
is the power supply voltage, and I
DI
is the digit driver input
current.
TABLE 3. MM74C911 Segment