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RDA012M4 RDA012M4 DATASHEET
DS_0012PD1-5006


Teledyne Scientific Company reserves the right to make changes to its product specifications at any time without notice.
The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.

Page 1 of 12
RDA012M4
12 Bit 1.2 GS/s 4:1 MUXDAC
Features 12 Bit Resolution 1.2 GS/s Sampling Rate 4:1 or 2:1 Input Multiplexer Differential Analog Output Input code format: Offset Binary Output Swing: 600 mV with 50
Termination 3.3V NMOS-Compatible Data Inputs Differential ECL or Sinusoidal Clock Input LVDS Compatible Clock Output 10-bit static linearity Reference Output/Input Pin for Accurate
Full-Scale Adjustment. 3.3V and -5.2V Power Supply 77 Lead HSD package



Product Description
The RDA012M4 is a digital-to-analog converter
(DAC) with a 4:1 input multiplexer and a
maximum update rate of 1.2GS/s. The
integrated DAC utilizes a segmented current
source to reduce the glitch energy and to
achieve high linearity performance. For best
dynamic performance, the DAC outputs are
internally terminated with 50 resistance, and
outputs a nominal full-scale current of 12mA
when terminated with external 50 resistors. For
a convenient interface with most CMOS ICs, the
digital data inputs are low voltage NMOS
compatible.
Ordering information
PART NUMBER
DESCRIPTION
RDA012M4-HD
12 BIT 1.2GS/s MUXDAC, HSD Package
RDA012M4-DI
12 BIT 1.2GS/s MUXDAC, DIE
EVRDA012M4-HD RDA012M4-HD Evaluation Board

Figure 1 - Functional Block Diagram RDA012M4 DATASHEET
DS_0012PD1-5006


Teledyne Scientific Company reserves the right to make changes to its product specifications at any time without notice.
The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.

Page 2 of 12
Absolute Maximum Ratings
Supply Voltages
Between GNDs .. -0.3 to +0.3 V
Between VCCs .... -0.3 to +0.3 V
VCCs to GND ... 0 V to +3.8 V

RF Input Voltages
CLKIP, CLKIN to GND ........................ -3 V to 1 V

HS Digital Input Voltages
DI<0:11> ...................................................... 0 V to VCC

Output Termination Voltages
OUTP, OUTN to GND ..............................-1 V to 1 V

Temperature
Case Temperature -40 to +85 °C
Junction Temperature..... +125 °C
Lead, Soldering (10 Seconds) .. +220 °C
Storage..... -60 to 125 °C















RDA012M4 DATASHEET
DS_0012PD1-5006


Teledyne Scientific Company reserves the right to make changes to its product specifications at any time without notice.
The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
Page 3 of 12
DC Electrical Specification
Test Conditions (see notes for specific conditions): Room Temperature; VCC = 3.3V; VEEA = -5.2V; VEED = -5.2V; VREFA = -2V;
VREFD = -2V; Clock: 1.2GHz, 0.6Vpp Differential; Outputs Terminated Into 50 to 0V.

PARAMETER SYMBOL
CONDITIONS,
NOTE MIN TYP
MAX
UNITS
1.0 DC
TRANSFER
FUNCTION
1.1
Differential Nonlinearity
DNL
Maximum of Absolute Value

4

LSB
1.2
Integral Nonlinearity
INL
Maximum of Absolute Value

4

LSB
2.0 TEMPERATURE
DRIFT
2.1 Warm-up
Time
After
Power-up
30 s
3.0
HIGH CLOCK INPUT (HCLKIP, HCLKIN)
3.1 Input
Resistance
Z
CIN

Resistance to VTT
45
50
55
4.0
DIGITAL INPUTS (DIA<0:11>, DIB<0:11>, DIC<0:11>, DID<0:11>)
4.1 Input
Resistance
R
DIN

2K
5.0
LOW CLOCK OUTPUT (LCLKOP, LCLKON)
5.1 Common
Mode
V
CM,LCKO

0.9 1.2 1.5 V
5.2 Amplitude
Voltage
V
CPP,LCKO
Differential LVDS
250
350 450
mV
6.0
ANALOG OUTPUTS (OUTP, OUTN)
6.1
Full-scale Output Swing
V
FSD

Differential, Terminated Into 50 to
GND on Each Output
1140 1200 1260 mVpp
6.2
Full-scale Output Swing
V
FSS

Single Ended, Terminated Into
50 to GND
570
600 630 mVpp
6.3
Full-scale Output Range
V
FSRS

Single Ended, Terminated Into
50 to GND (MIN=000h,
MAX=FFFh)
-650
0 V
6.4 Output
Current
I
OUT

Terminated Into 50 to GND
12 mA
7.0
ANALOG REFERENCE (VREFA)
7.1 Reference
Voltage
V
VREFA

Output from Internal Reference
-1.9
-2
-2.1
V
8.0 DIGITAL
REFERENCE
(VREFD)
8.1 Reference
Voltage
V
VREFD

Output from Internal Reference
-1.9
-2
-2.1
V
9.0
POWER SUPPLY REQUIREMENTS
9.1 Positive
Current
ICC
150 mA
9.2
Negative Current, Analog
IEEA


95

mA
9.3
Negative Current, Digital
IEED


420

mA
9.4
Power Dissipation
P
Total Dissipation

3.3

W
9.5 Power
Dissipation
P
VCC
Positive
Supply
0.5 W
9.6 Power
Dissipation
P
VEEA

Negative Supply, Analog

0.5

W
9.7 Power
Dissipation
P
VEED

Negative Supply, Digital

2.3

W
RDA012M4 DATASHEET
DS_0012PD1-5006


Teledyne Scientific Company reserves the right to make changes to its product specifications at any time without notice.
The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
Page 4 of 12
AC Electrical Specification
Test Conditions (see notes for specific conditions): Room Temperature; VCC = 3.3V; VEEA = -5.2V; VEED = -5.2V; VREFA = -2V;
VREFD = -2V; Clock: 1.2GHz, 0.6Vpp Differential; Outputs Terminated Into 50 to 0V.
PARAMETER
SYMBOL
CONDITIONS,
NOTE MIN
TYP
MAX
UNITS
10.0 DYNAMIC
PERFORMANCE
10.1 SFDR
SFDR
1
F
CLK
= 800MHz, F
OUT
=
267MHz 56 dB
10.2 SFDR
SFDR
2
F
CLK
= 1GHz, F
OUT
=
333MHz
53 dB
10.3 SFDR
SFDR
3
F
CLK
= 1.2GHz, F
OUT
=
400MHz 50 dB
11.0
DATA TIMING (DIA<0:11>, DIB<0:11>, DIC<0:11>, DID<0:11>)
11.1
Data In to LCLKO Setup
t
DTLCKST

300
ps
11.2
Data In to LCLKO Hold
t
DTLCKHD

-50

ps

Operating Conditions

PARAMETER SYMBOL
CONDITIONS,
NOTE
MIN
TYP
MAX
UNITS
12.0
HIGH CLOCK INPUTS (HCLKIP, HCLKIN)
12.1 Amplitude
V
CPP

Differential
ECL
400 600 800 mV
12.2 Common
Mode
Voltage V
CCM

-0.8
-1.5
-2 V
12.3 Maximum
Frequency
F
MAX

1200
MHz
12.4 Minimum
Frequency
F
MIN

1 MHz
13.0
DIGITAL INPUTS (DIA<0:11>, DIB<0:11>, DIC<0:11>, DID<0:11>)
13.1
Input High Voltage
V
IH

0.9
VCC
V
13.2
Input Low Voltage
V
IL

-0.4

0.4 V
14.0
TERMINATION VOLTAGE (VTT)
14.1 Termination
Voltage
V
TT

Termination Voltage for HCLKI

-2

V
15.0
ANALOG REFERENCE (VREFA)
1
(note 1)
15.1 Reference
Voltage
V
REF

-2.5
-2
-1.2 V
16.0 DIGITAL
REFERENCE
(VREFD)
16.1 Reference
Voltage
V
REF

-2.5
-2
-1.2 V
17.0
POWER SUPPLY REQUIREMENTS
17.1
Positive
Supply
Voltage
VCC
3.1 3.3 3.5 V
17.2
Analog Supply Voltage
VEEA

-5.4 -5.2 -5.0
V
17.3
Digital Supply Voltage
VEED

-5.4 -5.2 -5.0
V
18.0 OPERATING
TEMPERATURE
2
(note 2)
18.1
Case Temperature
Tc
Measured at Bottom Plate
-40

85
°C
18.2 Junction
Temperature
Tj

120
°C


1
The DAC core current is generated from an internal reference that is both temperature and supply dependent. The Internal
reference can change up to ±2% by changing the supply voltage within the specified range. It can also change up to ±5%
according to operating temperature changes. The change in temperature and supply can be minimized by using a precision
external voltage reference source connected to VREFA.
2
The part is designed to function with a junction temperature up to 125°C. For the best performance, operation within the specified
temperature range with a proper heatsink attached to the device is recommended. The heatsink should be attached to the bottom
of the PCB, on a metal pad connect by thermal vias to the metal pad where the part is soldered.


RDA012M4 DATASHEET
DS_0012PD1-5006


Teledyne Scientific Company reserves the right to make changes to its product specifications at any time without notice.
The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
Page 5 of 12
Pin Description and Pin Layout

P/I/O PIN
NUM.
NAME
FUNCTION
P
7, 16, 39, 62
4
VCC
+3.3V Digital Power Supply
P
1, 68, 71, 72, 73, 74, 75, 76, 77
9
VEEA
-5.2V Analog Power Supply
P
10, 14, 26, 52, 64, 67
6
VEED
-5.2V Digital Power Supply
P Bottom
Plate
-
GND
Ground
I
2
1
VREFA
-2V Reference Voltage
I
12
1
VREFD
Digital Circuitry Bias Reference. Bypass to Ground
I
4
1
VTT
HCLKI Clock Termination Voltage
I 6
1
MXM Mux Mode
Selection:
Float 4:1 (channels A, B, C, D)
GND 2:1 (channels B, C)
I 5
1 HCLKIP
I 3
1 HCLKIN Clock Input
I 8
1 LCLKOP
I 9
1 LCLKON Low Clock Output
I
11, 13, 15, 17, 18, 19, 20, 21, 22, 23, 24, 25
12
DIA<0:11>
DIA<i> Is Channel A Digital Bit i Input. MSB is bit 11
I
27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38
12
DIB<0:11>
DIB<i> Is Channel B Digital Bit i Input. MSB is bit 11
I
51, 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, 40
12
DIC<0:11>
DIC<i> Is Channel C Digital Bit i Input. MSB is bit 11
I
66, 65, 63, 61, 60, 59, 58, 57, 56, 55, 54, 53
12
DID<0:11>
DID<i> Is Channel D Digital Bit i Input. MSB is bit 11
O 70
1
OUTP
O 69
1
OUTN Differential Output






















Figure 2 - RDA012M4-HD pinout (top view). RDA012M4 DATASHEET
DS_0012PD1-5006


Teledyne Scientific Company reserves the right to make changes