GROUNDING IN HIGH SPEED SYSTEMS Walt Kester, James Bryant
The importance of maintaining a low impedance large area ground plane is critical to practically all analog circuits today, especially at high speeds. The ground plane not only acts as a low impedance return path for high frequency currents but also minimizes EMI/RFI emissions. Because of the shielding action of the ground plane, the circuits susceptibility to external EMI/RFI is also reduced. All IC ground pins should be soldered directly to the ground plane to minimize series inductance. Power supply pins should be decoupled to the ground plane using low inductance ceramic surface mount capacitors. If through-hole mounted ceramic capacitors must be used, their leads should be less than 1mm. Ferrite beads may be also required. The ground plane allows the impedance of PCB traces to be controlled, and high frequency signals can be terminated in the characteristic impedance of the trace to minimize reflections when necessary. Each PCB in the system should have at least one complete layer dedicated to the ground plane. Ideally, a double-sided board should have one side dedicated to ground and the other side for interconnections. In practice, this is not possible, since some of the ground plane will certainly have to be removed to allow for signal and power crossovers and vias. Nevertheless, as much area as possible should be preserved, and at least 75% should remain. After completing an initial layout, the ground layer should be checked carefully to make sure there are no isolated ground "islands." IC ground pins located in a ground "island" have no current return path to the ground plane. The best way of minimizing ground impedance in a multicard system is to use another PCB as a backplane for interconnections between cards, thus providing a continuous ground plane to the mother card. The PCB connector should have at least 30-40% of its pins devoted to ground, and these pins should be connected to the ground plane on the backplane mother card. To complete the overall system grounding scheme there are two possibilities: (1) The backplane ground plane can be connected to chassis ground at numerous points, thereby diffusing the various ground current return paths. (2) The ground plane can be connected to a single system "star ground" point (generally at the power supply). The first approach is often used at very high frequencies and where the return currents are relatively constant. The low ground impedance is maintained all the way through the PC boards, the backplane, and ultimately the chassis. It is critical that good electrical contact be made where the grounds are connected to the sheet metal chassis. This requires self-tapping sheet metal screws or "biting" washers. Special care must be taken where anodized aluminum is used for the chassis material, since its surface acts as an insulator. In other systems, especially high speed ones with large amounts of digital circuitry, it is highly desirable to physically separate sensitive analog components from noisy digital components. It is usually desirable to use separate ground planes for the analog and the digital circuitry. On PCBs which have both analog and digital 1 circuits, there are two separate ground planes. These planes should not overlap in order to minimize capacitive coupling between the two. The separate analog and digital ground planes are continued on the backplane using either motherboard ground planes or "ground screens" which are made up of a series of wired interconnections between the connector ground pins. The arrangement shown in Figure 7.26 illustrates that the two planes are kept separate all the way back to a common system "star" ground, generally located at the power supplies. The connections between the ground planes, the power supplies, and the "star" should be made up of multiple bus bars or wide copper brads for minimum resistance and inductance. The back-to-back Schottky diodes on each PCB are inserted to prevent accidental DC voltage from developing between the two ground systems when cards are plugged and unplugged. SEPARATING ANALOG AND DIGITAL GROUNDS
VA VD VA
ANALOG GROUND PLANE VD
DIGITAL GROUND PLANE PCB ANALOG GROUND PLANE DIGITAL GROUND PLANE PCB A D
DIGITAL GND PLANE A D BACKPLANE ANALOG GND PLANE VA SYSTEM STAR GROUND POWER SUPPLIES VD a 7.26 Sensitive analog components such as amplifiers and voltage references are referenced and decoupled to the analog ground plane. The ADCs and DACs (and even some mixed-signal ICs) should be treated as analog components and also grounded and decoupled to the analog ground plane. At first glance, this may seem somewhat contradictory, since a converter has an analog and digital interface and usually pins designated as analog ground (AGND) and digital ground (DGND). The diagram shown in Figure 7.27 will help to explain this seeming dilemma. 2 PROPER GROUNDING OF ADCs, DACs, AND OTHER MIXED-SIGNAL ICs
VA A D ADC, OR DAC VA CSTRAY VD A D ANALOG IN/OUT ANALOG CIRCUITS A DIGITAL CIRCUITS B CSTRAY "QUIET" DIGITAL BUFFER LATCH NOISY DATA BUS A IA AGND ID DGND V A = ANALOG A GROUND PLANE A D = DIGITAL D GROUND PLANE a 7.27 Inside an IC that has both analog and digital circuits, such as an ADC or a DAC, the grounds are usually kept separate to avoid coupling digital signals into the analog circuits. Figure 7.27 shows a simple model of a converter. There is nothing the IC designer can do about the wirebond inductance and resistance associated with connecting the pads on the chip to the package pins except to realize it's there. The rapidly changing digital currents produce a voltage at point B which will inevitably couple into point A of the analog circuits through the stray capacitance, CSTRAY. In addition, there is approximately 0.2pF unavoidable stray capacitance between every pin of the IC package! It's the IC designer's job to make the chip work in spite of this. However, in order to prevent further coupling, the AGND and DGND pins should be joined together externally to the analog ground plane with minimum lead lengths. Any extra impedance in the DGND connection will cause more digital noise to be developed at point B; it will, in turn, couple more digital noise into the analog circuit through the stray capacitance. The name "DGND" on an IC tells us that this pin connects to the digital ground of the IC. This does not imply that this pin must be connected to the digital ground of the system. It is true that this arrangement will inject a small amount of digital noise on the analog ground plane. These currents should be quite small, and can be minimized by ensuring that the converter input/or output does not drive a large fanout (they normally can't by design). Minimizing the fanout on the converter's digital port will also keep the converter logic transitions relatively free from ringing, and thereby minimize any potential coupling into the analog port of the converter. The logic 3 supply pin (VD) can be further isolated from the analog supply by the insertion of a small lossy ferrite bead as shown in Figure 7.27. The internal digital currents of the converter will return to ground through the VD pin decoupling capacitor (mounted as close to the converter as possible) and will not appear in the external ground circuit. It is always a good idea (as shown in Figure 7.27) to place a buffer latch adjacent to the converter to isolate the converter's digital lines from any noise which may be on the data bus. Even though a few high speed converters have three-state outputs/inputs, this isolation latch represents good design practice. The buffer latch and other digital circuits should be grounded and decoupled to the digital ground plane of the PC board. Notice that any noise between the analog and digital ground plane reduces the noise margin at the converter digital interface. Since digital noise immunity is of the orders of hundreds or thousands of millivolts, this is unlikely to matter. POWER SUPPLY, GROUNDING, AND DECOUPLING POINTS
VA VA VD A A A VD ADC OR DAC VA A BUFFER LATCH D A VA AGND DGND TO OTHER DIGITAL CIRCUITS A A D VOLTAGE REFERENCE SAMPLING CLOCK GENERATOR VA A = ANALOG GROUND PLANE = DIGITAL GROUND PLANE A A A D a 7.28 Separate power supplies for analog and digital circuits are also highly desirable. The analog supply should be used to power the converter. If the converter has a pin designated as a digital supply pin (VD), it should either be powered from a separate analog supply, or filtered as shown in the diagram. All converter power pins should be decoupled to the analog ground plane, and all logic circuit power pins should be decoupled to the digital ground plane. If the digital power supply is relatively quiet, it may be possible to use it to supply analog circuits as well, but be very cautious. The sampling clock generation circuitry should also be grounded and heavilydecoupled to the analog ground plane. As previously discussed, phase noise on the sampling clock produces degradation in system SNR. A low phase-noise crystal oscillator should be used to generate the ADC sampling clock, because sampling clock jitter modulates the input signal and raises the noise 4 and distortion floor. The sampling clock generator should be isolated from noisy digital circuits and grounded and decoupled to the analog ground plane, as is true for the op amp and the ADC. Ideally, the sampling clock generator should be referenced to the analog ground plane in a split-ground system. However, this is not always possible because of system constraints. In many cases, the sampling clock must be derived from a higher frequency multi-purpose system clock which is generated on the digital ground plane. If it is passed between its origin on the digital ground plane to the ADC on the analog ground plane, the ground noise between the two planes adds directly to the clock and will produce excess jitter. The jitter can cause degradation in the signal-to-noise ratio and also produce unwanted harmonics. This can be remedied somewhat by transmitting the sampling clock signal as a differential one using either a small RF transformer or a high speed differential driver and receiver as shown in Figure 7.29. The driver and receiver should be ECL to minimize phase jitter. In either case, the original master system clock should be generated from a low phase noise crystal oscillator. SAMPLING CLOCK DISTRIBUTION FROM DIGITAL TO ANALOG GROUND PLANES
+VD +VD DIGITAL GROUND PLANE (D) ANALOG GROUND PLANE (A) LOW PHASE NOISE MASTER CLOCK SYSTEM CLOCK GENERATORS SAMPLING CLOCK METHOD 1 D +VD D D +VD A +VA SAMPLING CLOCK DSP
METHOD 2 D A D a 7.29 It is evident that noise can be minimized by paying attention to the system layout and preventing different signals from interfering with each other. High level analog signals should be separated from low level analog signals, and both should be kept away from digital signals. We have seen elsewhere that in waveform sampling and reconstruction systems the sampling clock (which is a digital signal) is as vulnerable to noise as any analog signal, but is as liable to cause noise as any digital signal, and so must be kept isolated from both analog and digital systems. If a ground plane is used, as it should in be most cases, it can act as a shield where sensitive signals cross. Figure 7.30 shows a good layout for a data acquisition board 5 where all sensitive areas are isolated from each other and signal paths are kept as short as possible. While real life is rarely as tidy as this, the principle remains a valid one. A PC BOARD LAYOUT SHOWING GOOD SIGNAL ROUTING SAMPLING CLOCK GENERATOR TIMING CIRCUITS CONTROL LOGIC REF ADC BUFFER LATCH DEMULTIPLEXER FILTER DSP AMPLIFIER BUFFER MEMORY POWER MULTIPLE GROUNDS ANALOG INPUT ADDRESS BUS DATA BUS MULTIPLE GROUNDS a 7.30 There are a number of important points to be considered when making signal and power connections. First of all a connector is one of the few places in the system where all signal conductors must run parallel - it is therefore a good idea to separate them with ground pins (creating a faraday shield) to reduce coupling between them. Multiple ground pins are important for another reason: they keep down the ground impedance at the junction between the board and the backplane. The contact resistance of a single pin of a PCB connector is quite low (of the order of 10 mOhms) when the board is new - as the board gets older the contact resistance is likely to rise, and the board's performance may be compromised. It is therefore well worthwhile to afford extra PCB connector pins so that there are many ground connections (perhaps 30-40% of all the pins on the PCB connector should be ground pins). For similar reasons there should be several pins for each power connection, although there is no need to have as many as there are ground pins. 6 POWER SUPPLY NOISE REDUCTION AND FILTERING Walt Jung and John McDonald
Precision analog circuitry has traditionally been powered from well regulated, low noise linear power supplies. During the last decade however, switching power supplies have become much more common in electronic systems. As a consequence, they also are being used for analog supplies. Good reasons for the general popularity include their high efficiency, low temperature rise, small size, and light weight. In spite of these benefits, switchers do have drawbacks, most notably high output noise. This noise generally extends over a broad band of frequencies, resulting in both conducted and radiated noise, as well as unwanted electric and magnetic fields. Voltage output noise of switching supplies are short-duration voltage transients, or spikes. Although the fundamental switching frequency can range from 20kHz to 1MHz, the spikes can contain frequency components extending to 100MHz or more. While specifying switching supplies in terms of RMS noise is common vendor practice, as a user you should also specify the peak (or p-p) amplitudes of the switching spikes, with the output loading of your system. The following section discusses filter techniques for rendering a noisy switcher output analog ready, that is sufficiently quiet to power precision analog circuitry with relatively small loss of DC terminal voltage. The filter solutions presented are generally applicable to all power supply types incorporating switching element(s) in their energy path. This includes various DC-DC converters as well as popular 5V (PC type) supplies. An understanding of the EMI process is necessary to understand the effects of supply noise on analog circuits and systems. Every interference problem has a source, a path, and a receptor [Reference 1]. In general, there are three methods for dealing with interference. First, source emissions can be minimized by proper layout, pulse-edge rise time control/reduction, filtering, and proper grounding. Second, radiation and conduction paths should be reduced through shielding and physical separation. Third, receptor immunity to interference can be improved, via supply and signal line filtering, impedance level control, impedance balancing, and utilizing differential techniques to reject undesired common-mode signals. This section focuses on reducing switching power supply noise with external post filters. Tools useful for combating high frequency switcher noise are shown by Figure 7.31. They differ in electrical characteristics as well as practicality towards noise reduction, and are listed roughly in an order of priorities. Of these tools, L and C are the most powerful filter elements, and are the most cost-effective, as well as small sized. NOISE REDUCTION TOOLS n n Capacitors Inductors 7 n n n n Ferrites Resistors Linear Post Regulation PHYSICAL SEPARATION FROM SENSITIVE ANALOG CIRCUITS !! a 7.31 Capacitors are probably the single most important filter component for switchers. There are many different types of capacitors, and an understanding of their individual characteristics is absolutely mandatory to the design of effective practical supply filters. There are generally three classes of capacitors useful in 10kHz100MHz filters, broadly distinguished as the generic dielectric types; electrolytic, film, and ceramic. These can in turn can be further sub-divided. A thumbnail sketch of capacitor characteristics is shown in the chart of Figure 7.32. CAPACITOR SELECTION Aluminum Electrolytic (General Purpose) Size Rated Voltage ESR 100 µF (1) 25 V 0.6 @ 100 kHz Operating Frequenc y (2) 100 kHz Aluminum Electrolytic (Switching Type) 120 µF (1) 25 V 0.18 @ 100 kHz 500 kHz 100 µF (1) 20 V 0.12 @ 100 kHz 1 MHz 1 µF 400 V 0.11 @ 1 MHz 10 MHz 0.1 µF 50 V 0.12 @ 1 MHz 1 GHz Tantalum Electrolytic Polyester (Stacked Film) Ceramic (Multilayer) (1) Types shown in Figure 7.33 data (2) Upper frequency limit is strongly size and package dependent a 7.32 With any dielectric, a major potential filter loss element is ESR (equivalent series resistance), the net parasitic resistance of the capacitor. ESR provides an ultimate limit to filter performance, and requires more than casual consideration, because it 8 can vary both with frequency and temperature in some types. Another capacitor loss element is ESL (equivalent series inductance). ESL determines the frequency where the net impedance characteristic switches from capacitive to inductive. This varies from as low as 10kHz in some electrolytics to as high as 100MHz or more in chip ceramic types. Both ESR and ESL are minimized when a leadless package is used. All capacitor types mentioned are available in surface mount packages, preferable for high speed uses. The electrolytic family provides an excellent, cost-effective low-frequency filter component, because of the wide range of values, a high capacitance-to-volume ratio, and a broad range of working voltages. It includes general purpose aluminum electrolytic types, available in working voltages from below 10V up to about 500V, and in size from 1 to several thousand µF (with proportional case sizes). All electrolytic capacitors are polarized, and thus cannot withstand more than a volt or so of reverse bias without damage. They also have relatively high leakage currents (up to tens of µA, and strongly dependent upon design specifics). A subset of the general electrolytic family includes tantalum types, generally limited to voltages of 100V or less, with capacitance of 500µF or less[Reference 3]. In a given size, tantalums exhibit a higher capacitance-to-volume ratios than do general purpose electrolytics, and have both a higher frequency range and lower ESR. They are generally more expensive than standard electrolytics, and must be carefully applied with respect to surge and ripple currents. A subset of aluminum electrolytic capacitors is the switching type, designed for handling high pulse currents at frequencies up to several hundred kHz with low losses [Reference 4]. This capacitor type competes directly with tantalums in high frequency filtering applications, with the advantage of a broader range of values. A more specialized high performance aluminum electrolytic capacitor type uses an organic semiconductor electrolyte [Reference 5]. The OS-CON capacitors feature appreciably lower ESR and higher frequency range than do other electrolytic types, with an additional feature of low low-temperature ESR degradation. Film capacitors are available in very broad value ranges and an array of dielectrics, including polyester, polycarbonate, polypropylene, and polystyrene. Because of the low dielectric constant of these films, their volumetric efficiency is quite low, and a 10µF/50V polyester capacitor (for example) is actually a handful. Metalized (as opposed to foil) electrodes does help to reduce size, but even the highest dielectric constant units among film types (polyester, polycarbonate) are still larger than any electrolytic, even using the thinnest films with the lowest voltage ratings (50V). Where film types excel is in their low dielectric losses, a factor which may not necessarily be a practical advantage for filtering switchers. For example, ESR in film capacitors can be as low as 10m or less, and the behavior of films generally is very high in terms of Q. In fact, this can cause problems of spurious resonance in filters, requiring damping components. Typically using a wound layer-type construction, film capacitors can be inductive, which can limit their effectiveness for high frequency filtering. Obviously, only noninductively made film caps are useful for switching regulator filters. One specific style which is non-inductive is the stacked-film type, where the capacitor plates are cut as small overlapping linear sheet sections from a much larger wound drum of 9 dielectric/plate material. This technique offers the low inductance attractiveness of a plate sheet style capacitor with conventional leads [see References 4, 5, 6]. Obviously, minimal lead length should be used for best high frequency effectiveness. Very high current polycarbonate film types are also available, specifically designed for switching power supplies, with a variety of low inductance terminations to minimize ESL [Reference 7]. Dependent upon their electrical and physical size, film capacitors can be useful at frequencies to well above 10MHz. At the highest frequencies, only stacked film types should be considered. Some manufacturers are now supplying film types in leadless surface mount packages, which eliminates the lead length inductance. Ceramic is often the capacitor material of choice above a few MHz, due to its compact size, low loss, and availability up to several µF in the high-K dielectric formulations (X7R and Z5U), at voltage ratings up to 200V [see ceramic families of Reference 3]. NP0 (also called COG) types use a lower dielectric constant formulation, and have nominally zero TC, plus a low voltage coefficient (unlike the less stable high-K types). NP0 types are limited to values of 0.1µF or less, with 0.01µF representing a more practical upper limit. Multilayer ceramic "chip caps" are very popular for bypassing/ filtering at 10MHz or more, simply because their very low inductance design allows near optimum RF bypassing. For smaller values, ceramic chip caps have an operating frequency range to 1GHz. For high frequency applications, a useful selection can be ensured by selecting a value which has a self-resonant frequency above the highest frequency of interest. All capacitors have some finite ESR. In some cases, the ESR may actually be helpful in reducing resonance peaks in filters, by supplying "free" damping. For example, in most electrolytic types, a nominally flat broad series resonance region can be noted in an impedance vs. frequency plot. This occurs where |Z| falls to a minimum level, nominally equal to the capacitor's ESR at that frequency. This low Q resonance can generally be noted to cover a relatively wide frequency range of several octaves. Contrasted to the very high Q sharp resonances of film and ceramic caps, the low Q behavior of electrolytics can be useful in controlling resonant peaks. In most electrolytic capacitors, ESR degrades noticeably at low temperature, by as much as a factor of 4-6 times at ­55°C vs. the room temperature value. For circuits where ESR is critical to performance, this can lead to problems. Some specific electrolytic types do address this problem, for example within the HFQ switching types, the ­10°C ESR at 100kHz is no more than 2× that at room temperature. The OSCON electrolytics have a ESR vs. temperature characteristic which is relatively flat. Figure 7.33 illustrates the high frequency impedance characteristics of a number of electrolytic capacitor types, using nominal 100µF/20V samples. In these plots, the impedance, |Z|, vs. frequency over the 20Hz-200kHz range is displayed using a high resolution 4-terminal setup [Reference 8]. Shown in this display are performance samples for a 100µF/25V general purpose aluminum unit (top curve @ right), a 120µF/25V HFQ unit (next curve down @ right), a 100µF/20V tantalum bead type (next curve down @ right), and a 100µF/20V OS-CON unit (lowest curve @ right). While the HFQ and tantalum samples are close in 100kHz impedance, the 10 general purpose unit is about 4 times worse. The OS-CON unit is nearly an order of magnitude lower in 100kHz impedance than the tantalum and switching electrolytic types. IMPEDANCE Z( ) VS. FREQUENCY FOR 100 µ F ELECTROLYTIC CAPACITORS (AC CURRENT = 50mA RMS)
100 10 Z()
1 GEN. PURPOSE AL 100µF, 25V
0.1 "HFQ" 120µ F, 25V TANTALUM BEAD 100µ F, 20V
10m OS-CON AL 100µF, 20V
1m 20 100 1k 10k 100k 200k FREQUENCY (Hz) a 7.33 As noted, all real capacitors have parasitic elements which limit their performance. The equivalent electrical network representing a real capacitor models both ESR and ESL as well as the basic capacitance, plus some shunt resistance. In such a practical capacitor, at low frequencies the net impedance is almost purely capacitive (noted in Figure 7.33 by the 100Hz impedance). At intermediate frequencies, the net impedance is determined by ESR, for example about 0.12 to 0.4 at 125kHz, for several types. Above about 1MHz these capacitor types become inductive, with impedance dominated by the effect of ESL (not shown). All electrolytics will display impedance curves similar in general shape. The minimum impedance will vary with the ESR, and the inductive region will vary with ESL (which in turn is strongly effected by package style). Regarding inductors, Ferrites (non-conductive ceramics manufactured from the oxides of nickel, zinc, manganese, or other compounds) are extremely useful in power supply filters [Reference 9]. At low frequencies (