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CY7C656xx EZ-USB HX2LP’ Low-Power USB 2.0 Hub Controller Family EZ-USB HX2LP
Low-Power USB 2.0 Hub Controller Family
CY7C656xx
Cypress Semiconductor Corporation 198 Champion Court San Jose
,
CA 95134-1709 408-943-2600
Document #: 38-08037 Rev. *J
Revised April 14, 2008
Features USB 2.0 hub controller Automotive AEC grade option (40 - 85C) Compliant with the USB 2.0 specification USB-IF Certified: TID# 30000009 Windows Hardware Quality Lab (WHQL) - compliant Up to four downstream ports supported Supports bus powered and self powered modes Single Transaction Translator (TT) Bus power configurations Fit/form/function compatible with CY7C65640 and
CY7C65640A (TetraHub) Space saving 56-pin QFN Single power supply requirement Internal regulator for reduced cost Integrated upstream pull up resistor Integrated pull down resistors for all downstream ports Integrated upstream and downstream termination resistors Integrated port status indicator control 24 MHz external crystal (integrated PLL) In-system EEPROM programming Configurable with external SPI EEPROM: Vendor ID, Product ID, Device ID (VID/PID/DID) Number of active ports Number of removable ports Maximum power setting for high-speed and full-speed Hub controller power setting Power on timer Overcurrent detection mode Enabled/disabled overcurrent timer Overcurrent pin polarity Indicator pin polarity Compound device Enable full-speed only Disable port indicators Ganged power switching Self and bus powered compatibility Fully configurable string descriptors for multiple language
support
Routing Logic
Hub Repeater
USB Upstream Port
USB 2.0 PHY
PLL
Serial
Interface
Engine
High-Speed
USB Control Logic
SPI Communication
Block
USB Downstream Port 1
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 2
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 3
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 4
USB 2.0
PHY
Port Power
Control
Port
Status
SPI_SCK
SPI_CS
SPI_SD
D+
D-
PWR#[4]OVR#[4] LED
D+
D-
PWR#[3]OVR#[3] LED
D+
D- PWR#[2]OVR#[2] LED
D+
D- PWR#[1]OVR#[1] LED
Transaction Translator
TT RAM
D+
D -
24 MHz
Crystal
Block Diagram
CY7C65630
[+] Feedback CY7C656xx
Document #: 38-08037 Rev. *J
Page 2 of 25
Routing Logic
Hub Repeater
USB Upstream Port
USB 2.0 PHY
PLL
Serial
Interface
Engine
High-Speed
USB Control Logic
SPI Communication
Block
USB Downstream Port 1
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 2
USB 2.0
PHY
Port Power
Control
Port
Status
SPI_SCK
SPI_CS
SPI_SD
D+
D- PWR#[2]OVR#[2] LED
D+
D- PWR#[1]OVR#[1] LED
Transaction Translator (X1)
TT RAM
D+
D -
24 MHz
Crystal
Block Diagram
CY7C65620
[+] Feedback CY7C656xx
Document #: 38-08037 Rev. *J
Page 3 of 25
Introduction
EZ-USB

HX2LP is Cypress next generation family of high
performance, low power USB 2.0 hub controllers. HX2LP is an
ultra low power single chip USB 2.0 hub controller with integrated
upstream and downstream transceivers, a USB Serial Interface
Engine (SIE), USB Hub Control and Repeater logic, and Trans-
action Translator (TT) logic. Cypress has also integrated many
of the external passive components, such as pull up and pull
down resistors, reducing the overall bill of materials required to
implement a hub design. The HX2LP portfolio consists of:
1. CY7C65630: 4-port/single transaction translator
This device option is for ultra low power applications that re-
quire four downstream ports. All four ports share a single
transaction translator. The CY7C65630 is available in a 56
QFN and is also pin-for-pin compatible with the CY7C65640.
2. CY7C65620:
This device option is for a 2-port bus powered application.
Both ports share a single transaction translator. The
CY7C65620 is available in a 56 QFN.
All device options are supported by Cypress world class
reference design kits, which include board schematics, bill of
materials, Gerber files, Orcad files, and thorough design
documentation.
USB Serial Interface Engine
The Serial Interface Engine (SIE) allows the CY7C656xx to
communicate with the USB host. The SIE handles the following
USB activity independently of the Hub Control Block. Bit stuffing/unstuffing Checksum generation/checking TOKEN type identification Address checking.
Hub Repeater
The Hub Repeater manages the connectivity between upstream
and downstream facing ports that are operating at the same
speed. It supports full-/low-speed connectivity and high-speed
connectivity. According to the USB 2.0 specification, the HUB
Repeater provides the following functions:
Sets up and tears down connectivity on packet boundaries
Ensures orderly entry into and out of the Suspend state,
including proper handling of remote wakeups.
Transaction Translator
The Transaction Translator (TT) basically translates data from
one speed to another. A TT takes high-speed split transactions
and translates them to full-/low-speed transactions when the hub
is operating at high speed (the upstream port is connected to a
high-speed host controller) and has full-/low-speed devices
attached. The operating speed of a device attached on a
downstream facing port determines whether the Routing Logic
connects a port to the Transaction Translator or Hub Repeater.
If a full-/low-speed device is connected to the hub operating at
high speed, the data transfer route includes the Transaction
Translator. If a high-speed device is connected to this high-speed
hub, the route only includes the repeater and no Transaction
Translator since the device and the hub are operating at the
same speed. When the hub is operating at full speed (the
upstream port is connected to a full-speed host controller), a
high-speed peripheral does not operate at its full capability.
These devices only work at full speed. Full- and low-speed
devices connected to this hub operate at their normal speed.
Applications
Typical applications for the HX2LP device family are: Standalone hubs Motherboard hubs Monitor hubs Advanced port replicators Docking stations Split-PC designs External personal storage drives Keyboard hubs
Functional Overview
The Cypress CY7C656xx USB 2.0 Hubs are high performance,
low system cost solutions for USB. The CY7C656xx USB 2.0
Hubs integrate 1.5 k upstream pull up resistors for full-speed
operation and all downstream 15 k pull down resistors as well
as series termination resistors on all upstream and downstream
D+ and D pins. This results in optimization of system costs by
providing built-in support for the USB 2.0 specification.
System Initialization
On power up, the CY7C656xx reads an external SPI EEPROM
for configuration information. At the most basic level, this
EEPROM has the Vendor ID (VID), Product ID (PID), and Device
ID (DID) for the customer's application. For more specialized
applications, other configuration options can be specified. See
Configuration Options
on page 12 for more details.
After reading the EEPROM, if VBUSPOWER (connected to
up-stream V
BUS
) is high, CY7C656xx enables the pull up resistor
on D+ to indicate its presence to the upstream hub, after which
a USB Bus Reset is expected. During this reset, CY7C656xx
initiates a chirp to indicate that it is a high-speed peripheral. In a
USB 2.0 system, the upstream hub responds with a chirp
sequence, and CY7C656xx is in a high-speed mode, with the
upstream D+ pull up resistor turned off. In USB 1.x systems, no
such chirp sequence from the upstream hub is seen, and
CY7C656xx operates as a normal 1.x hub (operating at full
speed).
Enumeration
After a USB Bus Reset, CY7C656xx is in an unaddressed,
unconfigured state (configuration value set to 0). During the
enumeration process, the host sets the hub's address and
configuration.
Once the hub is configured, the full hub functionality is available.
[+] Feedback CY7C656xx
Document #: 38-08037 Rev. *J
Page 4 of 25
Downstream Ports
The CY7C656xx supports a maximum of four downstream ports,
each of which may be marked as usable or removable in the
extended configuration (0xD2 EEPROM load or 0xD4 EEPROM
load, see
Configuration Options
on page 12. Downstream D+
and D pull down resistors are incorporated in CY7C656xx for
each port. Before the hubs are configured, the ports are driven
SE0 (Single Ended Zero, where both D+ and D are driven low)
and are set to the unpowered state. Once the hub is configured,
the ports are not driven, and the host may power the ports by
sending a SetPortPower command for each port. After a port is
powered, any connect or disconnect event is detected by the
hub. Any change in the port state is reported by the hubs back
to the host through the Status Change Endpoint (endpoint 1).
Upon receipt of SetPortReset request for a port with a device
connected, the hub does as follows: Performs a USB Reset on the corresponding port Puts the port in an enabled state Enables the green port indicator for that port (if not previously
ov