QPI-10 datasheet AdvancedTCA Hot-Swap SiP with V€I Chip EMI Filter

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QPI-10 datasheet AdvancedTCA Hot-Swap SiP with V€I Chip EMI Filter Picor Corporation www.picorpower.com
QPI-10 Data Sheet Rev. 1.4 Page 1 of 8
AdvancedTCA
TM
Hot-Swap SiP with VI Chip EMI Filter
QPI-10
QUIETPOWER
®
Features
> 40 dB CM attenuation at 1 MHz
> 60 dB DM attenuation at 1 MHz
80 Vdc (max input)
100 Vdc surge 100 msec
1500 V hipot hold off to shield
6 A breaker with delay plus 12 A limiter
25 mm x 25 mm x 4.5 mm SiP (System-in-Package)
Low profile LGA package
- 40° to +100°C PCB temperature (See Fig. 5)
Hot-swap & filter combined saves PCB space
Efficiency ~99%
Connects between ORing diodes & power
conversion input hold-up capacitance
Patents pending
TÜV approval
Applications
Telecom & ATCA PICMG
®
3.0 boards using
Vicors VI Chip technology
Figure 1 Block Diagram
Figure 2 Typical Attenuation
Description
The QPI-10 integrates a total hot-swap function with
an EMI filter for VI Chip applications. The product
aligns with the AdvancedTCA
TM
PICMG3.0
require-ments for hot insertion and board level
conducted noise limitations. The EMI filter provides
conducted common-mode (CM) and differential-mode
(DM) noise attenuation from 150 kHz to 30 MHz.
The QPI-10 is designed for use on a 48 or 60 Vdc bus
(36 76 Vdc). The inrush current limit and circuit
breaker are designed to satisfy the 200 W per board
PICMG3.0 limit up to 70°C PCB temperature around
the QPI-10.
The under and overvoltage thresholds can be trimmed
separately via the UVEN and OV inputs using external
series resistors. The QPI-10 provides two Power Good
signals, with one referenced to the input ground and
the other to the output ground, which can be used to
enable other circuits along with the VI Chip converter.
® Picor Corporation www.picorpower.com
QPI-10 Data Sheet Rev. 1.4 Page 2 of 8
Absolute Maximum Ratings

Exceeding these parameters may result in permanent damage to the product.
Electrical Characteristics

Parameter
limits apply over the operating PCB temperature range unless otherwise noted
Pins
Parameter

Notes
Min
Typ
Max
Units
BUS+, SW, PWRGD1,
Input voltage
Continuous
-0.5
80
Vdc
PWRGD2 to BUS-
BUS+, SW, PWRGD1,
Input voltage
100 ms transient
100
Vdc
PWRGD2 to BUS-
BUS+ / BUS- to Shield
BUS inputs to shield hipot
+/-1500
Vdc
QPI+ to QPI-
Input to output current
Pulsed limit @ 25°C
12
Adc
Package
Power dissipation
VBUS = 48 V, 6 Adc, 25°C
3.0
W
Package
Operating temperature
PCB to QPI interface
-40
100
°C
Package
Thermal resistance
Free air
50
°C/W
Package
Junction temperature
Tb = 100 °C Pd = 3W @15°C/W
145
°C
Package
Thermal resistance
PCB layout dependent
(1)
15
°C/W
Package
Storage temperature
-40
125
°C
Package
Reflow temperature
20 s exposure @
(2)
212
°C
All Pins
ESD
HBM
+/-2
kV
Symbol
Parameter

Notes
Min
Typ
Max
Units
Vb+b-
BUS+ to BUS- input range
Measured at 5 A
(3)
UV
80
Vdc
V+oi
BUS+ to QPI+ voltage drop
Measured at 5 A
(3)
110
mVdc
V-oi
BUS- to QPI- voltage drop
Measured at 5 A
(3)
-380
mVdc
CMIL
Common-mode insertion loss
VBUS = 48 V frequency =1 MHz
40
dB
DMIL
Differential-mode insertion loss
VBUS = 48 V frequency =1 MHz
60
dB
I BUS + to BUS-
Input bias current at 80 V
Input current from BUS+ to BUS-
10
mA
IPG QPI+ to QPI- Load current prior to PWRGD
Critical maximum DC load
25
mA
UV
Undervoltage threshold - rising
Controller disabled to enabled
34
V
UVHYS
Undervoltage hysteresis - falling
Controller enabled to disabled
UV - 2 V
V
OV
Overvoltage threshold - rising
Controller enabled to disabled
76
V
OVHYS
Overvoltage hysteresis - falling
Controller disabled to enabled
OV - 4 V
V
PWRGD1SAT
Power Good low voltage
IPWG = 1 mA, referenced to BUS-
0.2
0.6
mV
PWRGD2SAT
Power Good low voltage
IPWG = 1 mA, referenced to QPI-
0.2
0.6
mV
PWGLK
Power Good high leakage
VPWG = 80 V
1
µA
Note 1: Refer to Figure 14 and Figure 15 for critical PCB layout guidelines to achieve this thermal resistance when reflowed onto the PCB.
Note 2: RoHS compliant product maximum peak temperature is 245°C for 20 seconds.
QPI-10
SiP Package
(Bottom View)

9 10 11 12

4 3 2 1
8
7
6
5
13
14
15
16
PWRGD2 PWRGD1 OV
BUS+
SHIELD SW
BUS-
QPI+
QPI-
BUS+
UVEN
SW
BUS-
Pad Description
Pin
Number
Name
Description
1, 16
BUS-
Negative bus potential
2, 3, 15
SW
Negative rail controlled by hot insertion
function.
4
SHIELD
Shield connects to the converter shield
and Y capacitor common point via RY
5, 6
QPI-
Negative input to the converter
7, 8
QPI+
Positive input to the converter
10
PWRGD1
Open drain, referenced to BUS-, that
asserts low when power is NOT good
9
PWRGD2
Open drain, referenced to QPI-, that
asserts low when power is NOT good
12, 13
BUS+
Positive bus potential
14
UVEN
Highside of UV resistor divider
11
OV
Highside of OV resistor divider
Note 3: Refer to Figure 5 for current derating curve Picor Corporation www.picorpower.com
QPI-10 Data Sheet Rev. 1.4 Page 3 of 8
Applications Information
The QPI-10 is an EMI filter especially designed for
VI Chip products, providing conducted common-mode
and differential-mode attenuation from 150 kHz to 30
MHz. Designed for the telecom and ITE bus range, the
QPI supports the PICMG
®
3.0 specification for filtering
system boards using Vicors VI Chip technology to the
EN55022 Class B limit.
The resulting plot in Figure 4 shows the QPI-10 is
effective in reducing the VI Chip total noise spectrum
to well below the EN55022 Class B Quasi-peak
detection limit.
The plot in Figure 4 was taken using the standard
50 / 50 µH LISN and measurement conditions, with the
Peak detection mode of the spectrum analyzer, for a
conducted EMI test. The results are compared to the
CISPR22 EN55022 Class B Quasi-peak detection limit
showing the total noise spectrum for VI Chip
combination using a P048K048T24 and V048K120T025
with a QPI-10 connected, as shown in Figure 3.
Figure 3 Standard LISN test setup, 170 W load.
Figure 4 Conducted EMI profile of VI Chip with QPI-10. Picor Corporation www.picorpower.com
QPI-10 Data Sheet Rev. 1.4 Page 4 of 8
Note: If the CE Capacitor is used, a maximum value of 1 k
should be used for RUVEN to prevent damaging the
enabling diodes.
Applications Information Hot-Swap
The QPI-10s high-temperature rating of 6 A provides
filtering for up to 288 W of power from a 48 V bus with
a 70°C PCB temperature. It is well suited for the 200 W
per board limit in the PICMG
®
3.0. The 1.0 x 1.0 x
0.2 surface mount LGA package provides ease of
manufacturing by eliminating through-hole assembly.
The current derating curve, shown in Figure 5, should
be used when the PCB temperature that the QPI-10 is
mounted to exceeds 70°C.
The hot-swap feature is created with an internal switch
that controls the current path between BUS- and SW
pins. The state of the switch can be on, off or in a
current-control mode depending on the state of the
control function.
The QPI-10 has two signal pins that can be used to
indicate the power-up status of the QPI-10. Both are
active-low when power is not good. PWRGD1 is an
opendrain that is referenced to the BUS- rail of the QPI-
10. PWRGD2 is an opendrain that is referenced to the
QPI rail, allowing it to directly control the Enable pin
of the VI Chip converter, without any kind of signal
translation required. An example circuit of both
options can be seen in Figures 8a and 8b.
The QPI-10 is designed to have an under-voltage
hysteretic range of 32 V to 34 V when the UVEN pin is
tied to the BUS+ pin with no additional series
resistance. The QPI-10 becomes enabled when the
input voltage exceeds 34 V and continues to work
down to 32 V before being disabled.
The over-voltage hysteretic range is designed to be
72 V to 76 V when the OV pin is tied to the BUS+ pin
without a trimming resistor in series. The QPI-10
remains functioning until the OV surpasses
76 V, where it will shutdown until the input voltage
falls below 72 V.
External resistors can be added to trim the UV and OV
trip points higher. The graph in Figure 6 shows the
trimming effect for a range of external series resistors.
The equations in Figure 7 can be used to calculate the
required series resistor for increasing the
preprogrammed trip points.
An external capacitor CE, shown in Figures 8a and 8b,
will provide the required hold-up filtering during the
AdvancedTCAs 5 ms, zero-volt BUS transient event.
This filtering will enable the Power Good state of the
QPI-10 to remain unchanged during this transient,
provided there is enough hold-up capacitance and
input energy to maintain the power converters
operation. Without this capacitor, the QPI-10 would
detect an undervoltage fault and shut off its internal
pass switch. The fault would also initiate a restart of
the hot-swap control and would require up to 20 ms to
turn back on its internal switch.
QPI-10 Current Derating Curve
0.00
2.00
4.00
6.00
8.00
0
20
40
60
80
100
Temperature °C
Current (A)
Figure 5 QPI-10 current derating curve over temperature.
UV/OV Trim
30.00
40.00
50.00
60.00
70.00
80.00
90.00
0
5000
10000
15000
20000
25000
30000
Series Resistor
V
olta
g
e
OV-High
OV-Low
UV-High
UV-Low
Figure 6 Trimming UV/OV with an external series resistor
Figure 7 UVEN and OV resistor equations.
UVEN
LO
=2.5 V(RUVEN + 108450)
8450
UVEN
HI
= 2.5 V + (RUVEN + 100K)(316µA)
OV
LO
= 2.5 V + (ROV + 200K)(348µA)
OV
HI
=2.5 V(ROV + 206800