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FAN7530 Critical Conduction Mode PFC Controller April 2007
F
AN7530 Critical Conduct
ion Mode PFC Controller
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7530 Rev. 1.0.2
FAN7530
Critical Conduction Mode PFC Controller
Features
Low Total Harmonic Distortion (THD)
Precise Adjustable Output Over-Voltage Protection
Open-Feedback Protection and Disable Function
Zero Current Detector
150µs Internal Start-up Timer
MOSFET Over-Current Protection
Under-Voltage Lockout with 3.5V Hysteresis
Low Start-up (40µA) and Operating Current (1.5mA)
Totem Pole Output with High State Clamp
+
500/-800mA Peak Gate Drive Current
8-pin DIP or 8-pin SOP
Applications
Adapter
Ballast
LCD TV, CRT TV
SMPS
Related Application Notes
AN-6027 - Design of Power Factor Correction Circuit
Using FAN7530
Description
The FAN7530 is an active power factor correction (PFC)
controller for the boost PFC applications that operates in
critical conduction mode (CRM). It uses the voltage
mode PWM that compares an internal ramp signal with
the error amplifier output to generate MOSFET turn-off
signal. Because the voltage mode CRM PFC controller
does not need the rectified AC line voltage information, it
can save the power loss of the input voltage sensing net-
work necessary for the current mode CRM PFC control-
ler.
FAN7530 provides many protection functions such as
over voltage protection, open-feedback protection, over-
current protection, and under-voltage lockout protection.
The FAN7530 can be disabled if the INV pin voltage is
lower than 0.45V and the operating current decreases to
65µA. Using a new variable on-time control method,
THD is lower than the conventional CRM boost PFC ICs.
Ordering Information
Part Number
Operating Temp.
Range
Pb-Free
Package Packing
Method
Marking
Code
FAN7530N
-40
°
C to +125
°
C
Yes
8-DIP
Rail
FAN7530
FAN7530M
-40
°
C to +125
°
C
Yes
8-SOP
Rail
FAN7530
FAN7530MX
-40
°
C to +125
°
C
Yes
8-SOP
Tape & Reel
FAN7530 F
AN7530 Critical Conducti
on Mode PFC Controller
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7530 Rev. 1.0.2
2
Typical Application Diagrams
Figure 1. Typical Boost PFC Application
Internal Block Diagram
Figure 2. Functional Block Diagram of FAN7530
GND
ZCD
INV
V
CC
AC
IN
V
O
COMP
FAN7530
CS
MOT
R1
R2
L
D
N
AUX
V
AUX
R
ZCD
I2
I1
C
O
FAN7530 Rev. 00
INV
Error
Amplifier
V
ref1
OVP
COMP
8pF
40k
2.5V
Ref
Internal
Bias
150ms
Timer
V
CC
ZCD
CS
UVLO
6.7V
12V 8.5V
2.675V
2.5V
Current Protection
Comparator
1V Offset
MOT
GND
Saw Tooth
Generator
Zero Current
Detector
R
S
Q
2
6
4
5
3
1
8
V
ref1
Gm
0.8V
Disable
0.45V 0.35V
Disable
1.5V
1.4V
7
V
CC
OUT
Drive
Output
Ramp
Signal
1V~5V
Range
13V
FAN7530 Rev. 00 F
AN7530 Critical Conducti
on Mode PFC Controller
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7530 Rev. 1.0.2
3
Pin Assignments
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
Description
1
INV
This pin is the inverting input of the error amplifier. The output voltage of the boost PFC
converter should be resistively divided to 2.5V.
2
MOT
This pin is used to set the slope of the internal ramp. The voltage of this pin is main-
tained at 3V. If a resistor is connected between this pin and GND, current flows out of
the pin and the slope of the internal ramp is proportional to this current.
3
COMP
This pin is the output of the transconductance error amplifier. Components for the out-
put voltage compensation should be connected between this pin and GND.
4
CS
This pin is the input of the over-current protection comparator. The MOSFET current is
sensed using a sensing resistor and the resulting voltage is applied to this pin. An
internal RC filter is included to filter switching noise.
5
ZCD
This pin is the input of the zero current detection block. If the voltage of this pin goes
higher than 1.5V, then goes lower than 1.4V, the MOSFET is turned on.
6
GND
This pin is used for the ground potential of all the pins. For proper operation, the signal
ground and the power ground should be separated.
7
OUT
This pin is the gate drive output. The peak sourcing and sinking current levels are
+500mA and -800mA respectively. For proper operation, the stray inductance in the
gate driving path must be minimized.
8
V
CC
This pin is the IC supply pin. IC current and MOSFET drive current are supplied using
this pin.
F A N 7 5 3 0
6
5
8
7
V
CC
OUT
GND
ZCD
1
2
3
4
COMP
CS
MOT
INV
Y W W
FAN7530 Rev. 00 F
AN7530 Critical Conducti
on Mode PFC Controller
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7530 Rev. 1.0.2
4
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. T
A
= 25°C unless otherwise specified.
Thermal Impedance
(1)
Note:
1. Regarding the test environment and PCB type, please refer to JESD51-2 and JESD51-10.
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
V
Z
V
I
OH
, I
OL
Peak Drive Output Current
+500/-800
mA
I
clamp
Driver Output Clamping Diodes V
O
>V
CC
or V
O
<-0.3V
±
10
mA
I
det
Detector Clamping Diodes
±
10
mA
V
IN
Error Amplifier, MOT, CS Input Voltages
-0.3 to 6
V
T
j
Operating Junction Temperature
150
°
C
T
A
Operating Temperature Range
-40 to 125
°
C
T
stg
Storage Temperature Range
-65 to 150
°
C
V
ESD_HBM
ESD Capability, Human Body Model
2.0
kV
V
ESD_MM
ESD Capability, Machine Model
300
V
V
ESD_CDM
ESD Capability, Charged Device Model
500
V
Symbol
Parameter
Value
Unit
R ja
Thermal Resistance, Junction-to-Ambient
8-DIP
110
°C/W
8-SOP
150
°C/W F
AN7530 Critical Conducti
on Mode PFC Controller
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7530 Rev. 1.0.2
5
Electrical Characteristics
V
CC
= 14V, T
A
= -40°C~125°C, unless otherwise specified.
Note:
2. These parameters, although guaranteed by design, are not tested in mass production.
Symbol Parameter
Condition
Min.
Typ.
Max.
Unit
UNDER-VOLTAGE LOCKOUT SECTION
V
th(start)
Start Threshold Voltage
V
CC
increasing
11
12
13
V
V
th(stop)
Stop Threshold Voltage
V
CC
decreasing
7.5
8.5
9.5
V
HY
(uvlo)
UVLO Hysteresis
3.0
3.5
4.0
V
V
Z
Zener Voltage
I
CC
= 20mA
20
22
24
V
SUPPLY CURRENT SECTION
I
st
Start-up Supply Current
V
CC
= V
th(start)
- 0.2V
40
70
µA
I
CC
Operating Supply Current
Output no switching
1.5
3.0
mA
I
dcc
Dynamic Operating Supply Current
50kHz, Cl=1nF
2.5
4.0
mA
I
CC(dis)
Operating Current at Disable
V
inv
= 0V
20
65
95
µA
ERROR AMPLIFIER SECTION
V
ref1
Voltage Feedback Input Threshold1
T
A
= 25
°
C
2.465
2.500
2.535
V V
ref1
Line Regulation
V
CC
= 14V ~ 20V
0.1
10.0
mV V
ref2
Temperature Stability of V
ref1(2)
20
mV
I
b(ea)
Input Bias Current
V
inv
= 1V ~ 4V
-0.5
0.5
µA
I
source
Output Source Current
V
inv
= V
ref1
- 0.1V
-12
µA
I
sink
Output Sink Current
V
inv
= V
ref1
+ 0.1V
12
µA
V
eao(H)
Output Upper Clamp Voltage
V
inv
= V
ref1
- 0.1V
5.4
6.0
6.6
V
V
eao(Z)
Zero Duty Cycle Output Voltage
0.9
1.0
1.1
V
g
m
Transconductance
(2)
90
115
140
µmho
MAXIMUM ON-TIME SECTION
V
mot
Maximum On-time Voltage
R
mot
= 40.5k 2.784
2.900
3.016
V
T
on(max)
Maximum On-time Programming
R
mot
= 40.5k , T
A
= 25
°
C
19
24
29
µs
CURRENT SENSE SECTION
V
CS(limit)
Current Sense Input Threshold
Voltage Limit
0.7
0.8
0.9
V
I
b(cs)
Input Bias Current
V
CS
= 0V ~ 1V
-1.0
-0.1
1.0
µA
t
d(cs)
Current Sense Delay to Output
(2)
dV/dt = 1V/100ns,
From 0V to 5V
350
500
ns F
AN7530 Critical Conducti
on Mode PFC Controller
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7530 Rev. 1.0.2
6
Electrical Characteristics
(Continued)
V
CC
= 14V, T
A
= -40°C~125°C, unless otherwise specified.

Note:
3. These parameters, although guaranteed by design, are not tested in mass production.
Symbol Parameter
Condition
Min.
Typ.
Max.
Unit
ZERO CURRENT DETECT SECTION
V
th(ZCD)
Input Voltage Threshold
(3)
1.35
1.50
1.65
V
HY
(ZCD)
Detect Hysteresis
(3)
0.05
0.10
0.15
V
V
clamp(H)
Input High Clamp Voltage
I
det
= 3mA
6.0
6.7
7.4
V
V
clamp(L)
Input Low Clamp Voltage
I
det
= -3mA
0
0.65
1.00
V
I
b(ZCD)
Input Bias Current
V
ZCD
= 1V ~ 5V
-1.0
-0.1
1.0
µA
I
source(zcd)
Source Current Capability
(3)
T
A
= 25
°
C
-10
mA
I
sink(zcd)
Sink Current Capability
(3)
T
A
= 25
°
C
10
mA
t
dead
Maximum Delay from ZCD to Output
Turn-on
(3)
dV/dt = -1V/100ns,
From 5V to 0V
100
200
ns
OUTPUT SECTION
V
OH
Output Voltage High
I
O
= -100mA, T
A
= 25
°
C
9.2
11.0
12.8
V
V
OL
Output Voltage Low
I
O
= 200mA, T
A
= 25
°
C
1.0
2.5
V
t
r
Rising Time
(3)
Cl = 1nF
50
100
ns
t
f
Falling Time
(3)
Cl = 1nF
50
100
ns
V
O(max)
Maximum Output Voltage
V
CC
= 20V, I
O
= 100 A
11.5
13.0
14.5
V
V
O(UVLO)
Output Voltage with UVLO Activated
V
CC
= 5V, I
O
= 100 A
1
V
RESTART TIMER SECTION
t
d(rst)
Restart Timer Delay
50
150
300
µs
OVER-VOLTAGE PROTECTION SECTION
V
ovp
OVP Threshold Voltage
T
A
= 25
°
C
2.620
2.675
2.730
V
HY
(ovp)
OVP Hysteresis
T
A
= 25
°
C
0.120
0.175
0.230
V
ENABLE SECTION
V
th(en)
Enable Threshold Voltage
0.40
0.45
0.50
V
HY
(en)
Enable Hysteresis
0.05
0.10
0.15
V F
AN7530 Critical Conducti
on Mode PFC Controller
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7530 Rev. 1.0.2
7
Typical Characteristic