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"Latch-Up,ESD,And Other Phenomena" Application Report
SLYA014A - May 2000
1
Latch-Up, ESD, and Other Phenomena
Eilhard Haseloff
Standard Linear & Logic
ABSTRACT
The engineer designing an electronic system often needs to know the behavior of its
components under operating conditions that are outside those usually described in the data
sheets. Thus, although the latch-up effect is no longer a problem with modern CMOS circuits,
a closer look at this phenomenon makes it easier for the engineer to assess realistically the
risks that may arise under specific perhaps extreme operating conditions. The
electromagnetic compatibility of integrated circuits, as well as their sensitivity and immunity
to these effects, plays a significant role. Under particular operating conditions, parasitic
transistors in integrated circuits can jeopardize the correct function of a component. This
application report discusses latch-up, electrostatic discharge (ESD), and other phenomena,
and their relationships, thereby providing designers information needed to assure the
functional security of the system, even under extreme operating and environmental
conditions.
Contents
1
Introduction
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Latch-Up
3
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2.1
Parasitic Thyristors
3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
Precautions to Be Taken Against Latch-Up
5
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3
Latch-Up Test
6
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4
Pseudolatch-Up
8
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.1 Pseudolatch-Up With Analog Circuits
8
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.2 Pseudolatch-Up With Bipolar Transistors
9
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Electrostatic Discharges
10
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3.1
Human-Body Model
10
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3.2
Machine Model
12
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3.3
Charged-Device Model
12
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3.4
Charged-Cable Model
14
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3.5
ESD-Protection Circuits
14
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.6
Potentialities and Limitations of Protection Circuits
15
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3.7
External Protection Circuits
17
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4
Parasitic Transistors in Integrated Circuits
18
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1
Precautions to Protect Analog Circuits
21
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2
High-Frequency Effects
23
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3
Behavior of Logic Circuits
23
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Summary
25
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References
26
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SLYA014A
2
Latch-Up, ESD, and Other Phenomena
List of Figures
1
Parasitic Transistors in a CMOS Circuit
3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Parasitic Thyristor in a CMOS Circuit
4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Guard Rings in a CMOS Circuit
6
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Latch-Up Test Circuit
7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Simplified Circuit of a Differential Amplifier
8
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Output Characteristics With Load Resistor
9
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7
Human-Body Model Test Circuit
11
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8
Machine-Model Test Circuit
12
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9
Equivalent Circuit of Discharge of the Charged-Device Model
13
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Charged-Device Model Test Setup
13
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
ESD-Protection Circuits Using Diodes
14
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Two-Stage ESD-Protection Circuits
15
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Protection Circuits for Integrated Circuits
17
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
Protection Circuit for Extreme Requirements
18
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
Parasitic Transistors in Bipolar Circuits
19
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
Input Circuit With Parasitic Transistor
19
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
Parasitic Transistors in CMOS Circuits
20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
Characteristics of Voltage Limiter TL7726
21
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
A/D Converter With Limitation of the Input Voltage
22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
Rectification of High-Frequency Interference Signals
23
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
Waveforms on an Open-Circuit Line
24
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1
Introduction
When a customer buys an integrated circuit a gate or an operational amplifier from a
semiconductor manufacturer, it contains considerably more transistors and diodes than are
necessary for the basic function. The additional components, such as the clamping diodes on
the inputs and outputs of logic circuits, are required to ensure reliable operation under particular
conditions. These components limit the overshoots and undershoots resulting from line
reflections and, thus, reduce signal distortion. Also, protection circuits, which are intended to
protect the component from destruction as a result of electrostatic discharge, are provided.
In addition to these intentionally integrated additional components, an integrated circuit also
contains a number of transistors and diodes that inevitably result from the construction and
manufacture of the semiconductor circuit. These components are called parasitic transistors and
diodes. Under normal operating conditions, as specified in the data sheets, such parasitic
components have no influence on the function of the circuit. However, in particular situations,
these parts of the circuit suddenly and unexpectedly can become active, and threaten the
correct operation of the complete system. Therefore, the development engineer who uses
integrated circuits also must be acquainted with the behavior of parasitic components. Only then