when Walt was in charge,
Disneyland would sell you a book of
ride tickets comprised of various
combinations of denominations from
A through E. The scheme had the
effect of turning zillions of visiting
kids into budding entrepreneurs,
middlemen, and market makers. At a
tender age, we learned the basics of
free enterprise, everything from
options and futures to black markets
and monopoly power.
A-Tickets were only good for the
Mickey Mouse amusements your kid
brother might have liked. All the bet-
ter if you couldve conned him into
trading a couple of deflated As for a
crisp new pass to the most thrilling
rides, the coveted E-Ticket.
Of course, you couldve just tried
lying, cheating, or stealing to get your
hands on your little bros tickets. But
you didnt, knowing full well youd
get busted by the ever-vigilant FTC
father in total controlwhod likely
lay a bit of cruel and unusual punish-
ment on your behind. Theres proba-
bly a lesson there.
E-Chips
t
Tom Cantrell
Some
tickets
allow you
to see
profes-
sional sporting events,
others get you into
amusement parks.
This month, Tom
familiarizes you with
E-Chipsthe newest
and hottest tickets for
accessing the I-way.
SILICON
UPDATE
Back in my February column, I pon-
dered the choices designers face when
deciding how to network-enable their
embedded applications (Working the
Net, Circuit Cellar 151). I hope the
message you took away was that its
important to understand the complexi-
ties and subtleties hidden behind the
simple-sounding catchphrase. In that
column, one thing all the solutions had
in common was Ethernet, setting the
stage for the emergence of a new class
of Ethernet chips, or E-Chipsthe E-
Tickets you need to board that thrill
ride known as the I-way.
PARC PLACE
Most of you are familiar with the
Ethernet story, it being another of the
pivotal advances in computing spawned
during the glory years at Xeroxs herald-
ed Palo Alto Research Center, a.k.a.
PARC. [1] That was a time when much
of what we experience today as com-
putingnetworking, object-oriented
languages, laser printers, bitmap dis-
plays, and even the ubiquitous mouse
floated to the top of the primordial
brew at PARC.
In fact, the roots of Ethernet go even
further back, in particular to the Aloha
network developed at the University of
Hawaii. [2] Aloha actually evolved as a
packet radio protocol, but the funda-
mental issue of multiple users con-
tending for access over a shared medi-
um translated nicely to Xeroxs goal of
hanging a bunch of Alto workstations
and laser printers on a single wire.
Ethernet passed many milestones dur-
ing the long journey from Bob Metcalfes
mid-70s brainstorm and 2.94-Mbps pro-
totype. The Ethernet ball really got
going in the late 1970s thanks to the so-
called DIX consortium (DEC, Intel, and
Xerox) that successfully standardized
and commercialized the concept.
The next level came as a blessing
from the IEEE with the first of the
now myriad 802.x LAN standards.
Actually, the standard codified a num-
ber of changes to the DIX version that
led to a period of confusion as the
number of implementations and
upgrade proposals proliferated.
However, within the last few years,
the situation has been resolvedfirst
in favor of 10BaseT and subsequently
Circuit Cellar, the Magazine for Computer Applications. Reprinted
by permission. For subscription information, call (860) 875-2199, or
www.circuitcellar.com. Entire contents copyright ©2001 Circuit
Cellar Inc. All rights reserved. 2
Issue 153 April 2003
CIRCUIT CELLAR
®
www.circuitcellar.com
(10,000 quantity), and thats
today, not some future price pro-
jection. As Ive said all along, the
penetration of networking into
embedded apps is only limited by
the cost, and chips like the
NS7520 will further the cause.
The NS7520 extends its cost-
cutting aspirations from the chip
price itself to the entire systems
cost. Budget-burning extremes
typically associated with 32-bit
chips (factors such as clock rate,
power consumption, packaging,
and glue logic) are avoided.
Consider that the entry-level,
no-cache ARM7TDMI core runs at a
leisurely 55 MHz off a plain 18.432-
MHz crystal. Furthermore, that core
includes the denser Thumb 16-bit
code option, reducing the software
footprint. Theres a full-fledged, no-
glue-logic bus interface for direct con-
nection to all the popular memory
chips: SRAM, flash memory, and
DRAM/SDRAM (the latter via built-in
address multiplexing and refresh).
Dynamic bus sizing and programma-
ble wait states support a mixture of
8-, 16-, and 32-bit add-ons.
In many respects, the NS7520 is
more like a controller than a proces-
sor. Theres a decent set of peripherals
including timers (two general-purpose
16-bit, watchdog, and bus error),
16 general-purpose I/O lines (four pro-
grammable as interrupt inputs), and
two high-performance UART-, SDLC-,
and SPI-capable serial ports.
The built-in 802.3u-compliant
Ethernet media access controller (MAC)
supports both traditional 10BaseT half
duplex (i.e., multidrop) and increasing-
and SPI ports before itis well on its
way to becoming standard equipment.
Whats impressive is the range of
performance and I/O capabilities rep-
resented, which are summed up in
Table 1. That means choosing an inte-
grated Ethernet solution need not be
an exercise in compromise. Covering a
range from 8 to 32 bits and everything
in-between, one of these parts is likely
a close fit with your application
requirements. If not, just wait awhile,
and no doubt there will be even more
E-Chips to choose from.
Give NetSilicon credit for being one
of the first companies to kick things
off with their NET+ARM product line,
which was introduced five years ago.
As the name implies, NET+ARM
combines an ARM chip, Ethernet, and
the required stacks of RTOS, network
protocols, and development tools.
Whats striking about the latest
incarnation, the NS7520, is whats
missing, notably the most significant
digit of the price tag. The sticker for
this little puppy is a mere $7.95
100BaseTX. One or both of these
is behind the Fast Ethernet RJ-
45 jacks on typical PC and net-
work gear of recent vintage. The
compelling advantage for these
two versions of the standard is
that they are upward/downward-
compatible (i.e., ports are increas-
ingly dual-speed 10/100 capable)
thanks to the fact that they use
the same wiring (shielded twisted
pair) and pin assignment.
Its still called Ethernet, but
along the way even the funda-
mentals have been changed. For
instance, taking advantage of the
extra wires in the cable, modern
Ethernet configurations are increas-
ingly point-to-point, full-duplex links
versus the shared-wire, half-duplex
scheme of the original. With full-
duplex links, you get twice the speed
and dont have to worry about carrier
sensing, multiple access, and collision
detection (i.e., CSMA/CD).
Of course, the headlines these days
are about the new 1-Gbps (and even
10-Gbps) versions of Ethernet on the
horizon. For now, Ill leave those to
the performance-at-any-price and big-
iron infrastructure crowd. On the
embedded front, the challenge is to
find a simple and inexpensive way to
drop a standard 10/100 Ethernet inter-
face into practically anything. And,
thanks to the Silicon wizards, its eas-
ier than ever to do just that.
MAC ATTACK
Lets take a look at fivecount em,
fivenew chips with built-in Ethernet.
Indeed, the pace of announcements may
indicate Ethernetlike UARTs, I
2
C,
Photo 1
The UNC20 imodule (here mounted on the evaluation kits
base board) is an easy and low-cost way to get under the hood or
quickly to production with a NetSilicon NS7520-based solution.
Table 1
Start thinking Ethernet, because the E-Chips are coming to town.
NetSilicon NS7520
Motorola MCF5282
Zilog eZ80F91
Rabbit R4000
Maxim DS80C400
CPU
ARM7TMDI (55 MHz)
ColdFire V2 (66 MHz)
eZ80 (50 MHz)
Rabbit 4000 (70 MHz)
C390 (75 MHz)
On-chip memory
2.5-KB SRAM
512-KB flash memory,
256-KB flash memory,
None
9.5-KB SRAM,
8-KB SRAM, 2-KB cache
16-KB SRAM
64-KB ROM
Expansion bus
26-bit address,
24-bit address,
24-bit address,
20-bit address,
24-bit address,
8-, 16-, and 32-bit data
8-, 16-, and 32-bit data
8-bit data
8-bit data
8-bit data
Ethernet
10/100 MII
10/100 MII
10/100 MII
10BaseT full-duplex only
10/100 MII
Peripherals
Timers (4),
Timers (17),
Timers (6),
Timers (12),
Timers (5),
serial ports (2)
serial ports (3),
serial ports (2),
serial ports (6),
serial ports (3),
clock-serial ports (2),
clock serial ports (2)
quadrature decode,
1-wire port, CAN
eight-channel 10-bit
slave interface
ADC, CAN
Power (est.)
1.5-V core, 3.3-V I/O, 0.5 W
3.0 V, 0.5 W
3.3 V, 0.2 W
2.5-V core, 3.3-V I/O, 0.2 W
1.8-V core, 3.3-V I/O, 0.2 W
Package
177-pin BGA
256-pin BGA
144-pin QFP
144-pin BGA
100-pin QFP www.circuitcellar.com
CIRCUIT CELLAR
®
Issue 153 April 2003
3
queued subsystem thats com-
prised of internal (eight-channel)
or external (18-channel) multi-
plexing, automatic scan sequenc-
ing and timing, dedicated results
RAM, and user-defined channel-
control processing.
Its overkill if you just want to
check a temperature sensor or
potentiometer from time to
time. But, for sophisticated ana-
log processing, the QADC offers
the promise of offloading the
CPU of a huge amount of hand-
holding.
Its all the better that the 5282
also features an EMAC math accelera-
tor that cranks 32 × 32 multiply
results into a 48-bit MAC in a single