A 500 MHz PN Generator


Virginia Polytechnic Institute and State University
in partial fulfillment of the requirements for the degree of

BACHELOR OF SCIENCE IN HONORS
in
Electrical Engineering

Approved:


__________________________________
Theodore S. Rappaport
(Honors Mentor)

ii














© Copyright 1999
by
Christopher R. Anderson


iii



A 500 MHz PN Generator

by
Christopher R. Anderson
Honors Mentor: Theodore S. Rappaport
Electrical Engineering

Abstract


The field of wireless communications is currently growing at an unprecedented rate. This
growth, prompted in part by the demand for more high-speed, broadband communication
systems, has led to the need for high-resolution, broadband wireless measurement equipment.
This thesis reports on the development of a rudimentary high-speed/Radio Frequency (RF)
printed circuit board fabrication facility, to assist future research efforts to develop and prototype
these types of measurement systems. In addition, an attempt is made to fabricate one component
of a multipath propagation measurement system, a high-speed pseudo-random noise (PN) signal
generator.

High-speed printed circuit board design requires a variety of highly specialized
equipment and software. This equipment allows for efficient design, layout, and construction of
printed circuit boards. Also, many design issues arise at high frequencies, such as propagation
delay, characteristic impedance, and trace lengths, among many others. This thesis reports on
the development of a rapid prototyping procedure to ensure that all circuit boards designed and
constructed during this and future projects would achieve their required operating specifications.
iv

Beyond creating a RF printed circuit board fabrication facility, part of this project was to
design and build a 500 MHz PN Signal Generator. This device would allow multipath
propagation measurements to be made with a resolution of 2 nanoseconds, and a RF bandwidth
of 1 GHz, thus fulfilling the need for high-resolution ultra-broadband wireless measurement
equipment. Because logic design at these speeds is tricky, many problems were encountered that
slowed the actual maximum operating speed of the board. Most of these were believed to be
caused by a distorted clock signal, which prevented the rest of the board from operating.

This thesis presents a comprehensive overview of the development of a printed circuit
board rapid prototyping facility, the equipment and software necessary to implement these
designs, and an attempt at fabricating a 500 MHz PN Sequence Generator.

v



Acknowledgements

All glory belongs to God the Father and His Son Jesus Christ, Master Engineers of the universe,
for endowing me with the ability and perseverance to undertake a project of this magnitude.

I would also like to thank my parents for the many sacrifices they have made so that I
may obtain an education of the highest quality.

My advisor, Prof. Rappaport, gave me this interesting project, and a blank check for any
supplies and equipment necessary to complete it. For this and for providing encouragement and
support throughout the duration of this project I am forever grateful.

Many people at MPRG provided help in understanding the theory and concepts behind
this research, resolving difficulties with electronics, and fabrication throughout the duration of
this project, and I desire that they realize how much I appreciate their time and efforts. They are:
Greg Durgin, Hao Xu, Stani Licul, Brian Walsh, Mujhaid Ali, Chris Swift, and Dr. Bob Boyle.
Also several people at MPRG took care of all the administrative details involved in a
project, freeing me up to do the actual research: Cindy Reifsnider, Hilda Reynolds, and Shelby
Smith.

This thesis would not have been possible without considerable help from many generous
people in industry. Mr. Edward Valentine of ProTronics provided technical support and advice
on printed circuit board layout.
Gene Howell of International Resistive Corporation (IRC) provided some much-needed
insight in the area of device characterization and donated some resistors with excellent RF
properties.

Greg Bull of Rogers Corporation arranged for the donation of all of the circuit board
materials used in this project, and even arranged for several custom boards to be donated as well.
This project would not have been possible without his help, and I am truly grateful.

Mrs. Julie Sparks from Ellsworth Adhesives provided the conformal coatings used in this
project, as well as advice and assistance in selecting the right one.
vi

Also, I would like to thank Paul Nguyen and Shadat Mahmud for their moral support
during this project and during all the years I spent at Virginia Tech. For this, I am forever in
their debt.

Finally, this project is dedicated to the people that believed in me before I began to
believe in myself: the late Colonel Roy W. Forehand, Mrs. Scotty Ellerbe, and Mr. Tom
Cottingham.

vii






Contents


Acknowledgements
v
1
Introduction
1

1.1 Principles of Pseudonoise (PN) Generator Operation. 1

1.2 Overview of Circuit Board Fabrication... 4

1.3 Issues in High Speed Design... 5
1.4 Thesis Overview. 8

2
Software and Hardware
10

2.1 LPKF ProtoMat 91s/VS Milling & Drilling Machine. 10

2.2 Design and Manufacturing Software Packages 11

2.3 Special Assembly Tools and Equipment.. 12

3
2-Layer Circuit Board Fabrication
14

3.1 Schematic Design..14

3.2 Selection of Components.. 14

3.3 Board Layout 17

3.4 Board Manufacturing 24

3.5 Brushing and Cleaning. 27

3.6 Soldering... 28

3.7 Testing.. 30

3.8 Conformal Coating... 32
viii
4
High-Speed PN Generator Design
33

4.1 Major Issues. 33

4.2 Original Design and its Limitations. 34

4.3 Attempts to Fabricate Individual Parts 37

4.4 Breadboarding the Design 38

4.5 First Whole-Board Design.. 38

4.6 Second Whole-Board Design.. 42

4.7 Third Whole-Board Design.. 46

5
Future Considerations
47

5.1 Clock Generation. 47

5.2 Multi-Layer Board... 47

5.3 Selectable Clock Speed and Code Length... 48

6
Summary
49

6.1 Summary.. 49

6.2 Results. 49

6.3 Contributions 50

A
The LPKF ProtoMat 91s/VS, its Operation and Care
51

A.1 Basic Mechanical Set-Up and Operation 51


A.1.1 Tool Change... 54

A.2 Producing A PCB 54


A.2.1 Securing the PCB to the Machine Surface. 56


A.2.2 Setting Tool Depth. 58

A.3 Periodic Maintainance 59

Bibliography
60
ix









List of Tables



3.1 Mil-STD-275E Hole Diameter 19
3.2 Mil-STD-275E Hole Tolerances. 19



x










List of Figures




1.1
Block Diagram of a PN Generator. 2
1.2
Autocorrelation of PN Waveform.. 3
1.3
Microstrip Transmission Line 6
2.1
Copperset Through-Hole Plating... 12
3.1
Component Pad Definition (with typical component provided for reference).. 15
3.2
Comparison of Footprint Sizes.. 15
3.3
Comparison of Some IC Footprints... 16
3.4
Annular Ring...... 21
3.5
Right Angle Bend in Signal Trace..... 23
3.6
Chamfered Circuit Trace... 23
3.7
Mitering a Signal Trace. 24
3.8
Side View of a Proper Solder Joint.... 29
3.9
Experimental Test Setup 31
4.1
Original Schematic Design 35
4.2
Board #1 Schematic Design.. 39
4.3
Board #1 Top Layer.. 40
4.4
Board #1 Bottom Layer 41
4.5
Board #2 Schematic Design.. 43
4.6
Board #2 Top Layer.. 44
4.7
Board #2 Bottom Layer 44
xi
A.1
LPKF ProtoMat 91s/VS Side View.. 53
A.2
End View of PCB Properly Attached to Machine Surface.. 56

1




Chapter 1

Introduction

1.1

Principles of Pseudonoise (PN) Generator Operation


Figure 1.1 illustrates the basic block diagram of a pseudo-random noise (PN) sequence
generator. This device consists of a series of r shift registers with feedback taps and a modulo-2
adder (add without carry). The shift registers are clocked from a common clock line every T
c

seconds. The feedback taps can be arranged in a variety of orders to produce different output
codes. The particular code of interest in this project is a so-called maximal length code (or m-
sequence), which has the following properties [1]:

1.

It has a period of N chips, with N = 2
r
1.
2.

The modulo-2 sum of any m-sequence with a shifted version of itself produces
another shifted version of the same sequence.
3.

All possible r-bit words will appear in the sequence exactly once, except for the all-0
combination.
4.

The number of logic 1s is always 1 larger than the number of logic 0s
independent of the length of the code.
5.

The autocorrelation of the sequence is given by R
c
(k), where


1
1,
( )
,
c
N
k
N
R k
k
N
ì
ü
=
ï
ï
ï
ï
= í
ý
ï
ï
-
¹
ï
ï
î
þ
ll

(1.1)
2
6.

The autocorrelation of the waveform at the output of the PN sequence generator is
given by R
c
( ) in Equation 1.2 below [1].

(
)
1
1
( )
1
(
)
1
,
( )
0,
c
c
N
N
c
c
t
T
tT
NT
R
T
T is the clock rate also known as the chip rate
t
T
t
T
=
= =
+

= > l
l
l

(1.2)


Figure 1.1: Block Diagram of a PN Generator
R
c
( ) is plotted in Figure 1.2. This figure shows a periodic waveform with triangular pulses of
width 2T
c
repeated every NT
c
seconds, and a correlation h