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Basic FET Ampli�ers
C
H
A
P
T
E
R
6
Basic FET Ampli�ers
6.0
PREVIEW
In the last chapter, we described the operation of the FET, in particular the
MOSFET, and analyzed and designed the dc response of circuits containing
these devices. In this chapter, we emphasize the use of FETs in linear ampli�er
applications. Although a major use of MOSFETs is in digital applications, they
are also used in linear ampli�er circuits.
There are three basic con�gurations of single-stage or single-transistor
FET ampli�ers. These are the common-source, source-follower, and com-
mon-gate con�gurations. We investigate the characteristics of each con�gura-
tion and show how these properties are used in various applications. Since
MOSFET integrated circuit ampli�ers normally use MOSFETs as load devices
instead of resistors because of their small size, we introduce the technique of
usingMOSFET enhancement or depletion devices as loads. These three con-
�gurations form the building blocks for more complex ampli�ers, so gaining a
good understanding of these three ampli�er circuits is an important goal of this
chapter.
In integrated circuit systems, ampli�ers are usually connected in series or
cascade, forming a multistage con�guration, to increase the overall voltage
gain, or to provide a particular combination of voltage gain and output resis-
tance. We consider a few of the many possible multistage con�gurations, to
introduce the analysis methods required for such circuits, as well as their
properties.
JFET ampli�ers are also considered. These circuits, again, tend to be
specialized, so the JFET discussion is brief.
6.1
THE MOSFET AMPLIFIER
In Chapter 4, we discussed the reasons linear ampli�ers are necessary in analog
electronic systems. In this chapter, we continue the analysis and design of linear
ampli�ers that use �eld-effect transistors as the amplifyingdevice. The term
small signal means that we can linearize the ac equivalent circuit. We will de�ne
what is meant by small signal in the case of MOSFET circuits. The term linear
ampli�ers means that we can use superposition so that the dc analysis and ac
313 314
Part I Semiconductor Devices and Basic Applications
analysis of the circuits can be performed separately and the total response is the
sum of the two individual responses.
The mechanism with which MOSFET circuits amplify small time-varying
signals was introduced in the last chapter. In this section, we will expand that
discussion usingthe graphical technique, dc load line, and ac load line. In the
process, we will develop the various small-signal parameters of linear circuits
and the correspondingequivalent circuits.
There are four possible equivalent circuits that can be used. These are
listed in Table 4.3 of Chapter 4. The most common equivalent circuit that is
used for the FET ampli�ers is the transconductance ampli�er, in which the
input signal is a voltage and the output signal is a current. The small-signal
parameters associated with this equivalent circuit are developed in the follow-
ingsection.
6.1.1
Graphical Analysis, LoadLines, andSmall-Signal
Parameters
Figure 6.1 shows an NMOS common-source circuit with a time-varying vol-
tage source in series with the dc source. We assume the time-varying input
signal is sinusoidal. Figure 6.2 shows the transistor characteristics, dc load line,
and Q-point, where the dc load line and Q-point are functions of v
GS
, V
DD
, R
D
,
and the transistor parameters. For the output voltage to be a linear function of
the input voltage, the transistor must be biased in the saturation region. (Note
that, although we primarily use n-channel, enhancement-mode MOSFETs in
our discussions, the same results apply to the other MOSFETs.)
Also shown in Figure 6.2 are the sinusoidal variations in the gate-to-source
voltage, drain current, and drain-to-source voltage, as a result of the sinusoidal
source v
i
. The total gate-to-source voltage is the sum of V
GSQ
and v
i
. As v
i
increases, the instantaneous value of v
GS
increases, and the bias point moves up
+ v
GS
R
D
v
i
i
D
v
O
+ v
DS
V
DD
+ V
GSQ
+ Figure 6.31
Equivalent
circuit NMOS source-
follower, for determining
output resistanceFigure 6.1
NMOS common-source
circuit with time-varying
signal source in series with
gate dc source
v
DS
I
DQ
v
i
V
DD
V
DSQ
V
GSQ
v
DS
(sat)
Time
Time
Time
i
D
Q-point
Figure 6.2
Common-source transistor characteristics, dc load
line, and sinusoidal variation in gate-to-source voltage, drain
current, and drain-to-source voltage Chapter 6 Basic FET Amplifiers
315
the load line. A larger value of v
GS
means a larger drain current and a smaller
value of v
DS
. For a negative v
I
(the negative portion of the sine wave), the
instantaneous value of v
GS
decreases below the quiescent value, and the bias
point moves down the load line. A smaller v
GS
value means a smaller drain
current and increased value of v
DS
. Once the Q-point is established, we can
develop a mathematical model for the sinusoidal, or small-signal, variations in
gate-to-source voltage, drain-to-source voltage, and drain current.
The time-varyingsignal source v
i
in Figure 6.1 generates a time-varying
component of the gate-to-source voltage. In this case, v
gs
� v
i
, where v
gs
is the
time-varying component of the gate-to-source voltage. For the FET to operate
as a linear ampli�er, the transistor must be biased in the saturation region, and
the instantaneous drain current and drain-to-source voltage must also be con-
�ned to the saturation region.
Transistor Parameters
The instantaneous gate-to-source voltage is
v
GS
� V
GSQ
� v
i
� V
GSQ
� v
gs
�6:1�
where V
GSQ
is the dc component and v
gs
is the ac component. The instanta-
neous drain current is
i
D
� K
n
�v
GS
� V
TN
�
2
�6:2�
SubstitutingEquation (6.1) into (6.2) produces
i
D
� K
n
�V
GSQ
� v
gs
� V
TN
�
2
� K
n
��V
GSQ
� V
TN
� � v
gs
�
2
�6:3�a��
or
i
D
� K
n
�V
GSQ
� V
TN
�
2
� 2K
n
�V
GSQ
� V
TN
�v
gs
� K
n
v
2
gs
�6:3�b��
The �rst term in Equation (6.3(b)) is the dc or quiescent drain current I
DQ
,
the second term is the time-varyingdrain current component that is linearly
related to the signal v
gs
, and the third term is proportional to the square of the
signal voltage. For a sinusoidal input signal, the squared term produces unde-
sirable harmonics, or nonlinear distortion, in the output voltage. To minimize
these harmonics, we require
v
gs
( 2�V
GSQ
� V
TN
�
�6:4�
which means that the third term in Equation (6.3(b)) will be much smaller than
the second term. Equation (6.4) represents the small-signal condition that must
be satis�ed for linear ampli�ers.
Neglecting the v
2
gs
term, we can write Equation (6.3(b))
i
D
� I
DQ
� i
d
�6:5�
Again, small-signal implies linearity so that the total current can be separated
into a dc component and an ac component. The ac component of the drain
current is given by
i
d
� 2K
n
�V
GSQ
� V
TN
�v
gs
�6:6�
The small-signal drain current is related to the small-signal gate-to-source
voltage by the transconductance g
m
. The relationship is 316
Part I Semiconductor Devices and Basic Applications
g
m
� i
d
v
gs
� 2K
n
�V
GSQ
� V
TN
�
�6:7�
The transconductance is a transfer coef�cient relatingoutput current to input
voltage and can be thought of as representing the gain of the transistor.
The transconductance can also be obtained from the derivative
g
m
� @i
D
@v
GS




v
GS
�V
GSQ
�const:
� 2K
n
�V
GSQ
� V
TN
�
�6:8�a��
which can be written
g
m
� 2 �������������
K
n
I
DQ
p
�6:8�b��
The drain current versus gate-to-source voltage for the transistor biased in
the saturation region is given in Equation (6.2) and is shown in Figure 6.3. The
transconductance g
m
is the slope of the curve. If the time-varyingsignal v
gs
is
suf�ciently small, the transconductance g
m
is a constant. With the Q-point in
the saturation region, the transistor operates as a current source that is linearly
controlled by v
gs
. If the Q-point moves into the nonsaturation region, the
transistor no longer operates as a linearly controlled current source.
As shown in Equation (6.8(a)), the transconductance is directly propor-
tional to the conduction parameter K
n
, which in turn is a function of the width-
to-length ratio. Therefore, increasing the width of the transistor increases the
transconductance, or gain, of the transistor.
Example 6.1
Objective:
Calculate the transconductance of an n-channel
MOSFET.
Consider an n-channel MOSFET with parameters V
TN
� 1 V, �
1
2
�
n
C
ox
�
20 mA=V
2
, and W=L � 40. Assume the drain current is I
D
� 1 mA.
Solution: The conduction parameter is
K
n
� 12
n
C
ox

 W
L
 
� �20��40� mA=V
2
A 0:80 mA=V
2
I
DQ
V
GS
v
GS
V
Th
Time
Time
i
D
Slope = g
m
Figure 6.3
Drain current versus gate-to-source voltage characteristics, with superimposed
sinusoidal signals Chapter 6 Basic FET Amplifiers
317
Assumingthe transistor is biased in the saturation region, the transconductance is
determined from Equation (6.8(b)),
g
m
� 2 �������������
K
n
I
DQ
p
� 2 ���������������
�0:8��1�
p
� 1:79 mA=V
Comment: The transconductance of a bipolar transistor is g
m
� �I
CQ
=V
T
�, which is
38.5 mA/V for a collector current of 1 mA. The transconductance values of MOSFETs
tend to be small compared to those of BJTs. However, the advantages o