AT8XC5122/23 C51 Microcontroller with USB and Smart Card Reader Interface
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AT8XC5122/23 C51 Microcontroller with USB and Smart Card Reader Interface
Rev. 4202ESCR06/06
1
Features
Clock Controller
80C51 core with 6 clocks per instruction
8 MHz On-Chip Oscillator
PLL for generating clock to supply CPU core, USB and Smart Card Interfaces
Programmable CPU clock from 500 KHz / X1 to 48 MHz / X1
Reset Controller
Power On Reset (POR) feature avoiding an external reset capacitor
Power Fail Detector (PFD)
Watch-Dog Timer
Power Management
Two power saving modes : Idle and Power Down
Four Power Down Wake-up Sources : Smart Card Detection, Keyboard Interrupt, USB
Resume, External Interrupt
Input Voltage Range : 3.0V - 5.5V
Cores Power Consumption (Without Smart Card and USB) :
30 mA Maximum Operating Current @ 48 MHz / X1
200
A Maximum Power-down Current @ 5.5V
Interrupt Controller
up to 9 interrupt sources
up to 4 Level Priority
Memory Controller
Internal Program memory :
up to 32KB of Flash or CRAM or ROM for AT8xC5122
up to 30KB of ROM for AT83C5123
Internal Data Memory : 768 bytes including 256 bytes of data and 512 bytes of XRAM
Optional : internal data E2PROM 512 bytes
Two 16-bit Timer/Counters
USB 2.0 Full Speed Interface
48 MHz DPLL
On-Chip 3.3V USB voltage regulator and transceivers
Software detach feature
7 endpoints programmable with In or out directions and ISO, Bulk or Interrupt Transfers :
Endpoint 0: 32 Bytes Bidirectionnal FIFO for Control transfers
Endpoints 1,2,3: 8 bytes FIFO
Endpoints 4,5: 64 Bytes FIFO
Endpoint 6: 2*64 bytes FIFO with Pin-Pong feature
ISO 7816 UART Interface Fully Compliant with EMV, GIE-CB and WHQL Standards
Programmable ISO clock from 1 MHz to 4.8 MHz
Card insertion/removal detection with automatic deactivation sequence
Programmable Baud Rate Generator from 372 to 11.625 clock pulses
Synchronous/Asynchronous Protocols T=0 and T=1 with Direct or Inverse Convention
Automatic character repetition on parity errors
32 Bit Waiting Time Counter
16 Bit Guard Time Counter
Internal Step Up/Down Converter with Programmable Voltage Output:
VCC = 4.0V to 5.5V, 1.8V-30 mA, 3V-60 mA and 5V-60 mA
VCC = 3.0V, 1.8V-30 mA, 3V-30 mA and 5V-30 mA
Current overload protection
6 kV ESD (MIL/STD 833 Class 3) protection on whole Smart Card Interface
Alternate Smart Card Interface with CLK, IO and RST
UART Interface with Integrated Baud Rate Generator (BRG)
Keyboard interface with up to 20x8 matrix management capability
Master/Slave SPI Interface
Four 8 bit Ports, one 6 bit port, one 3-bit port
Up to Seven LED outputs with 3 level programmable current source : 2, 4 and 10 mA
Two General Purpose I/O programmable as external interrupts
Up to 8 input lines programmable as interrupts
Up to 30 output lines
C51
Microcontroller
with USB and
Smart Card
Reader
Interfaces
AT83C5122
AT83EC5122
AT85C5122
AT89C5122
AT89C5122DS
AT83C5123
AT83EC5123
2
AT8xC5122/23
4202ESCR06/06
Reference Documents
The user must get the following additionnal documents which are not included but which
complete this product datasheet
Product Errata Sheet
Bootloader Datasheet
3
AT8xC5122/23
4202ESCR06/06
Product Description
AT8xC5122/23 products are high-performance CMOS derivatives of the 80C51 8-bit
microcontrollers designed for USB smart card reader applications.
The AT8xC5122 is proposed in four versions :
- ROM version with or without internal data E2PROM. The ROM device is only factory
programmable.
- CRAM version without internal data E2PROM. The CRAM device implements a vola-
tile program memory which is programmed by means of an embedded ROMed
bootloader which transfers the code from a remote software programming tool called
FLIP through UART or USB interfaces.
- Flash version without internal data E2PROM. At power-up, the program located in the
flash memory is transferred into the CRAM then executed.
The AT83C5123 is a low pin count of the AT8xC5122 and is proposed in ROM version
with or without internal data E2PROM. The ROM device is only factory programmable.
The AT8xC5122DS is a secure version of the AT8xC5122 on which the external pro-
gram memory access mode is disabled.
4
AT8xC5122/23
4202ESCR06/06
Note:
The PLCC28 pinout is common to AT8xC5122 and AT83C5123 products
Table 1. Product versions
Features
AT83C5122
AT83EC5122
AT85C5122
AT89C5122
AT89C5122DS
AT83C5123
AT83EC5123
Packages
VQFP64
QFN64
PLCC28
Die Form
VQFP64
PLCC28
PLCC68
VQFP64
PLCC28
Die Form
VQFP64
QFN64
PLCC28
VQFP64
QFN64
VQFP32
QFN32
PLCC28
Die Form
QFN32
VQFP32
PLCC28
Program memory
32KB ROM
30KB ROM
32KB CRAM
32KB
E2PROM
32KB E2PROM
30KB ROM
30KB ROM
Internal Data E2PROM
No
512 Bytes
No
No
No
No
512 Bytes
Embedded bootloader
No
No
Yes
Yes
Yes
No
No
Features
VQFP32,
QFN32
packages
Features not available :
- Keyboard Interface
- Master/Slave SPI
Interface
- External Program Memory
Access
Reduced features :
- Only 12 I/O with up to 4
LED Outputs with
Programmable Current
PLCC68,
VQFP64,QFN64
packages
All features are available
All features are
available
except External
Program Memory
Access
PLCC28 package
Features not available :
- Alternate Smart Card Interface
- Keyboard Interface
- Master/Slave SPI Interface
- External Program Memory Access
Reduced features :
- Only 7 I/O with up to 4 LED Outputs with Programmable Current
5
AT8xC5122/23
4202ESCR06/06
AT8xC5122 Block Diagram
AT83C5123 Block Diagram
DC/DC
Conv erter
LI
CV
CC
C
VSS
UART
Interf ace
Tx
D
Rx
D
16-BIT
TIMERS
T[
0
-
1
]
Interrupt
Controller
I
N
T
[
0-
1]
Alternate
Card
CR
S
T
1
CC
L
K
1
CI
O
1
3.3 V
Regulator
VC
C
VSS
WATCH-DOG
POR
PFD
RESET
RST
PLL
PLLF
XTAL1
XTAL2
8 MHz
Oscillator
256 x 8
RAM
512 x 8
XRAM
80C
51
8-
B
I
T
CO
RE
256 x 8
RAM
INTERNAL ADDRESS AND DATA BUS
32K x 8
ROM (1)
32K x 8
E2PROM (1)
32K x 8
CRAM (1)
External Memory
Controller
EA
PSEN
AL
E
A[
8
-
1
5
]
AD
[
0
-7
]
WR
R
D
D+
D-
VR
EF
USB
Interf ace
I
S
O
7816
In
t
e
r
f
a
c
e
CCLK
CRST
CPRES
CC8
CC4
CIO
3.3V
Regulator
AVSS
AVC
C
DV
CC
Note 1 : the implementation of these f eatures depends on product v ersions
512 x 8
E2PROM (1)
Parallel I/O Ports
P0
[
0
-7
]
8-BIT
PORT
8-BIT
PORT
P2
[
0
-7
]
8-BIT
PORT
P3
[
0
-7
]
6-BIT
PORT
P4
[
0
-5
]
8-BIT
PORT
P5
[
0
-7
]
LED's
LE
D
[
0-
6]
3-BIT
PORT
P
1
[2
,6
-
7
]
SPI
Interf ace
MI
S
O
MO
SI
SC
K
SS
KBD
Interf ace
KB
[
0
-
7
]
DC/DC
Conv erter
LI
CV
C
C
C
VSS
UART
Interf ace
Tx
D
Rx
D
16-BIT
TIMERS
T[
0
-
1
]
Interrupt
Controller
IN
T
[
0
-
1
]
Alternate
Card
CR
S
T
1
CCL
K
1
CI
O
1
3.3 V
Regulator
VC
C
VS
S
WATCH-DOG
POR
PFD
RESET
RST
PLL
PLLF
XTAL1
XTAL2
8 MHz
Oscillator
256 x 8
RAM
512 x 8
XRAM
80
C
5
1
8-
B
I
T
CO
RE
256 x 8
RAM
INTERNAL ADDRESS AND DATA BUS
30K x 8
ROM
512 x 8
E2PROM (1)
Parallel I/O Ports
8-BIT
PORT
P3
[
0
-
7
]
D+
D-
VR
EF
USB
Interf ace
I
S
O
78
16
In
te
r
f
a
c
e
CCLK
CRST
CPRES
CC8
CC4
CIO
3.3V
Regulator
AVSS
AVC
C
DV
C
C
Note 1 : the implementation of these f eatures depends on product v ersions
1-BIT
PORT
P5
.
0
LED's
LE
D
[
0-
3
]
3-BIT
PORT
P
1
[2
,6
-
7
]
6
AT8xC5122/23
4202ESCR06/06
Pinout
High Pin Count Package
Description
AT8xC5122 version
Figure 1. VQFP64 Package Pinout
62 61 60 59 58
63
57 56 55 54 53
P
0
.1/A
D1
P
0
.3/A
D3
P
0
.5/A
D5
P
0
.7/A
D7
D+
P4.1/MOSI
P4.0/MISO
P4.2/SCK
P4.5/LED6
P3.1/TxD
P4.3/LED4
P4.4/LED5
P3.6/WR/LED2
D-
XT
AL
1
XT
AL
2
P2
.
5
/
A
1
3
P2
.
4
/
A
1
2
P2
.
2
/
A
1
0
P2
.
1
/
A
9
P2
.
0
/
A
8
CRST
CCLK
LI
P2
.
3
/
A
1
1
2
3
4
5
6
7
8
9
10
11
48
47
46
45
44
43
42
41
40
39
38
VQFP64
64
52
12
13
36
37
VC
C
VSS
P5.0/KB0
P
3
.7
/
RD/L
E
D3
51 50
AV
S
S
49
AV
C
C
P3.3/INT1
35
33
34
P3.4/T0/LED1
P3.5/T1/CRST1
CV
CC
14
15
16
CV
S
S
31 32
P
0
.0/A
D0
P1.2/CPRES
P
0
.2/A
D2
P
0
.4/A
D4
P
0
.6/A
D6
P1.6/SS
P2.7/A15
P2
.
6
/
A
1
4
P
1
.
7
/CCL
K
1
P5.1/KB1
P5.2/KB2
P5.3/KB3
P5.4/KB4
P5.5/KB5
P5.6/KB6
P5.7/KB7
P3.2/INT0/LED0/CIO1
CC4
PL
L
F
AL
E
PSEN
DVCC
CC8
CIO
P3.0/RxD
1
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VR
E
F
EA
RST
7
AT8xC5122/23
4202ESCR06/06
Figure 2. PLCC68 Package Pinout (for engineering purpose only)
18
17
16
15
14
13
11
P
0
.1/A
D1
P
0
.3/A
D3
P
0
.5/A
D5
P
0
.7/A
D7
D+
P4.1/MOSI
P4.0/MISO
P4.2/SCK
P4.5/LED6
CC8
P4.3/LED4
P4.4/LED5
P3.6/WR/LED2