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IMPACT OF EXTENSION LATERAL DOPING ABRUPTNESS ON DEEP SUBMICRON DEVICE PERFORMANCE
IMPACT OF
EXTENSION LATERAL DOPING ABRUPTNESS
ON DEEP SUBMICRON DEVICE PERFORMANCE
a dissertation
submitted to the department of electrical engineering
and the committee on graduate studies
of stanford university
in partial fulfillment of the requirements
for the degree of
doctor of philosophy
Michael Y. Kwong
August 2002 Copyright by Michael Y. Kwong 2002
All Rights Reserved
ii I certify that I have read this dissertation and that in
my opinion it is fully adequate, in scope and quality, as
a dissertation for the degree of Doctor of Philosophy.
Robert W. Dutton
(Principal Adviser)
I certify that I have read this dissertation and that in
my opinion it is fully adequate, in scope and quality, as
a dissertation for the degree of Doctor of Philosophy.
Bruce A. Wooley
(Electrical Engineering)
I certify that I have read this dissertation and that in
my opinion it is fully adequate, in scope and quality, as
a dissertation for the degree of Doctor of Philosophy.
Peter Grin
(Electrical Engineering)
Approved for the University Committee on Graduate
Studies:
iii Preface
Device scaling is directly responsible for Moores law and has enabled tremendous
improvements in MOS (Metal-Oxide-Semiconductor) device performance. As device
dimensions shrink, the channel resistance decreases, which in turn allows faster circuit
operation. Microprocessor chips operating at 2GHz or higher clock speeds are now
available. However, as the intrinsic device continues to improve, parasitic components
such as the series resistance in the source/drain region start to limit device perfor-
mance. Understanding and controlling these parasitic components, through proper
design of the device, are therefore essential.
TCAD (Technology Computer Aided Design) can be a tremendous tool that could
allow us to improve our understanding of various device design parameters on device
performance. It allows the conduction of detailed simulation studies whose exper-
imental counterparts would be prohibitively expensive. Furthermore, it allows the
probing of various internal quantities that are not available experimentally.
This thesis presents the results of a thorough study, made possible by TCAD tools,
of the impact of lateral abruptness and gate-extension overlap on device performance.
Lateral abruptness is considered a key device parameter that need to be controlled
for deep submicron devices, making this an important parameter to understand.
iv The study begins by making several simplifying assumptions. The design of mod-
ern deep submicron semiconductor device is very complex, making it dicult to un-
derstand. Simplifying the device design in the study allows the isolation of the features
of interest, and revealed several phenomena that would not have (and have not) been
noticed otherwise.
While the results and conclusions from this study are the main focus of this
thesis, considerable attention is paid to the methodology, algorithms and software
that enabled the successful execution of the study and processing of the simulation
results. Many of them can be useful for studying other device parameters. This could
be one of the major contributions of this work.
v Acknowledgments
The graduate school experience is one of the most amazing, frustrating, depressing,
yet ultimately rewarding journeys I have ever undertaken. There are many people
whose help and support has been crucial, and whom I would like to take this oppor-
tunity to thank.
I would like to thank my advisor, Professor Bob Dutton, for giving me the chance
to get a taste of research as an undergraduate, for accepting me into his research
group, and for his patient guidance throughout my graduate years. Not only did I
learn much about how to do research, I also learnt a great deal about myself in the
process, which I truly believe will serve me well for the rest of my life.
I would like to thank Dr. Peter Grin for the many discussions we had about my
research, for the numerous suggestions and feedback, for his detailed comments on
this thesis and other papers that I have written, and for all his mentoring eorts.
I would like to thank my associate advisor, Professor Bruce Wooley, for his advice
and moral support, as well as for his spending time reviewing my thesis. I would
also like to thank Professor Krishna Saraswat for his advice and for being on my
defense committee; and Professor Dwight Nishimura for agreeing to chair my defense
committee.
vi I would like to thank the Plummer group, and Professor Jim Plummer in partic-
ular, for allowing be to participate in their group meetings, and for oering valuable
comments, suggestions and critiques of my work.
I would also like to thank Dr. Dan Connelly and Dr. Michael Duanne for many
great discussions, especially for Dans work on I
on
-I
of f
as a metric for comparing deep
submicron technology, which this thesis utilizes extensively.
Reza: without your encouragements, suggestions and collaboration, I might not
have been able to nd my research way. Thank you with all my heart.
Ken, Nathan and Edward: thanks for lending an ear when times were tough. Hav-
ing group mates such as yourselves makes graduate student life much more tolerable
and much less lonely. Chang-hoon: thanks for sharing yours insights and ideas; you
have no idea how much I appreciate your help. And to the entire Dutton research
group: thanks for helping me grow and learn the past few years.
Fely, Maria, Miho and Dan: thanks for all the wonderful support that you provided
us, without which, we would all have taken years longer to nish! Zhiping: thanks
for spending so much of your time with me, and for seeing me through the tortuous
process of nding the right direction.
Tamara: TA extraordinaire, your enthusiasm is contagious, your passion for teach-
ing is inspiring, your warmth and encouragements I will never forget. May the wild
west saloon continue to be a refuge and source of wisdom for generations of students
to come.
Mar: thanks for the time you spent with me to generate research ideas. Danny,
Dave, Linda: thanks for being there and for all the support through the years! Jef:
I feel so blessed to have met you. Thank you for all the discussions, technical or
otherwise, and for the support you have given me.
vii To each and every one that I have met during my time at Stanford: thanks for
teaching me so much about myself and life. Hopefully I have been able to return a
little bit of the favor, in my own way.
Last but not least, I would like to thank my family for being supportive, under-
standing, patient, and for having shaped me into who I am.
viii Contents
Preface
iv
Acknowledgments
vi
1
Introduction
1
1.1
Device Scaling and Moores Law . . . . . . . . . . . . . . . . . . . . .
1
1.2
ITRS Roadmap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
1.3
Methodology of this Work . . . . . . . . . . . . . . . . . . . . . . . .
4
1.4
Scope and Organization
. . . . . . . . . . . . . . . . . . . . . . . . .
7
2
Challenges for Deep Sub-micron Device Design
9
2.1
Device Design Parameters and Device Scaling . . . . . . . . . . . . .
10
2.1.1
Key Device Design Parameters
. . . . . . . . . . . . . . . . .
10
2.1.2
Denition of Threshold Voltage . . . . . . . . . . . . . . . . .
11
2.1.3
First Order Device Scaling Theory
. . . . . . . . . . . . . . .
16
2.2
Second Order Eects in the Deep Sub-micron Regime . . . . . . . . .
16
2.2.1
Short Channel Eects
. . . . . . . . . . . . . . . . . . . . . .
17
2.2.2
Reverse Short Channel Eects . . . . . . . . . . . . . . . . . .
21
2.2.3
Source/Drain Resistance . . . . . . . . . . . . . . . . . . . . .
22
ix 2.2.4
Quantum Mechanical Eects . . . . . . . . . . . . . . . . . . .
25
2.3
Device Design in the Deep Sub-micron Regime . . . . . . . . . . . . .
29
2.3.1
Channel Engineering . . . . . . . . . . . . . . . . . . . . . . .
29
2.3.2
Source/Drain Engineering . . . . . . . . . . . . . . . . . . . .
31
2.4
Technology Computer Aided Design . . . . . . . . . . . . . . . . . . .
34
2.4.1
Traditional Device Design Process . . . . . . . . . . . . . . . .
34
2.4.2
Computer Simulations and Device Design
. . . . . . . . . . .
36
2.5
Challenges facing Technology Computer Aided Design . . . . . . . . .
38
2.5.1
Metrology . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
38
2.5.2
Physical Models . . . . . . . . . . . . . . . . . . . . . . . . . .
39
2.6
Summary
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
42
3Study of Lateral Abruptness
44
3.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
44
3.2
Methodology
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
45
3.2.1
Simulation Details
. . . . . . . . . . . . . . . . . . . . . . . .
45
3.2.2
Metric for Comparing Device Technologies . . . . . . . . . . .
46
3.3
Series Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
48
3.4
Threshold Voltage Roll-O